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Class Information
Number: 257/E23.18
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Packaging, interconnects, and markings for semiconductor or other solid-state devices (epo) > Containers; seals (epo)
Description: This subclass is indented under subclass E23.001. This subclass is substantially the same in scope as ECLA classification H01L23/02.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7394147 |
Semiconductor package |
Jul. 1, 2008 |
| 7348663 |
Integrated circuit package and method for fabricating same |
Mar. 25, 2008 |
| 7291901 |
Packaging method, packaging structure and package substrate for electronic parts |
Nov. 6, 2007 |
| 7262491 |
Die pad for semiconductor packages and methods of making and using same |
Aug. 28, 2007 |
| 7256067 |
LGA fixture for indium assembly process |
Aug. 14, 2007 |
| 7183140 |
Injection molded metal bonding tray for integrated circuit device fabrication |
Feb. 27, 2007 |
| 7183657 |
Semiconductor device having resin anti-bleed feature |
Feb. 27, 2007 |
| 7173324 |
Wafer level package for micro device |
Feb. 6, 2007 |
| 7173331 |
Hermetic sealing cap and method of manufacturing the same |
Feb. 6, 2007 |
| 6897742 |
Saw device using different colors or identifiers to distinguish the front and back of the package |
May. 24, 2005 |
| 6448637 |
Hermetically sealed integrated circuit package incorporating pressure relief valve for equalizing interior and exterior pressures when placed in spaceborne environment |
Sep. 10, 2002 |
| 6390353 |
Integral solder and plated sealing cover and method of making the same |
May. 21, 2002 |
| 4722441 |
Package structure for semiconductors |
Feb. 2, 1988 |
| 4580157 |
Semiconductor device having a soft-error preventing structure |
Apr. 1, 1986 |
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