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Class Information
Number: 257/E23.178
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Packaging, interconnects, and markings for semiconductor or other solid-state devices (epo) > Arrangements for conducting electric current within device in operation from one component to another, interconnections, e.g., wires, lead frames (epo) > Interconnection structure between plurality of semiconductor chips being formed on or in insulating substrates (epo) > Chips being integrally enclosed by interconnect and support structures (epo)
Description: This subclass is indented under subclass E23.169. This subclass is substantially the same in scope as ECLA classification H01L23/538V.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7612439 |
Semiconductor package having improved thermal performance |
Nov. 3, 2009 |
| 7608919 |
Interconnect packaging systems |
Oct. 27, 2009 |
| 7595553 |
Packaging board and manufacturing method therefor, semiconductor module and mobile apparatus |
Sep. 29, 2009 |
| 7579681 |
Super high density module with integrated wafer level packages |
Aug. 25, 2009 |
| 7576440 |
Semiconductor chip having bond pads and multi-chip package |
Aug. 18, 2009 |
| 7573135 |
Electronic parts packaging structure in which a semiconductor chip is mounted on a wiring substrate and buried in an insulation film |
Aug. 11, 2009 |
| 7566967 |
Semiconductor package structure for vertical mount and method |
Jul. 28, 2009 |
| 7563650 |
Circuit board and the manufacturing method |
Jul. 21, 2009 |
| 7550833 |
Semiconductor device having a second semiconductor construction mounted on a first semiconductor construction and a manufacturing method thereof |
Jun. 23, 2009 |
| 7550830 |
Stacked semiconductor package having fan-out structure through wire bonding |
Jun. 23, 2009 |
| 7529448 |
System, method and apparatus for improved electrical-to-optical transmitters disposed within printed circuit boards |
May. 5, 2009 |
| 7518240 |
Deposition pattern for eliminating backside metal peeling during die separation in semiconductor device fabrication |
Apr. 14, 2009 |
| 7514273 |
Method for applying rewiring to a panel while compensating for position errors of semiconductor chips in component positions of the panel |
Apr. 7, 2009 |
| 7498667 |
Stacked integrated circuit package-in-package system |
Mar. 3, 2009 |
| 7485569 |
Printed circuit board including embedded chips and method of fabricating the same |
Feb. 3, 2009 |
| 7466021 |
Memory packages having stair step interconnection layers |
Dec. 16, 2008 |
| 7459777 |
Semiconductor package containing multi-layered semiconductor chips |
Dec. 2, 2008 |
| 7444041 |
System, method and apparatus for improved electrical-to-optical transmitters disposed within printed circuit boards |
Oct. 28, 2008 |
| 7425758 |
Metal core foldover package structures |
Sep. 16, 2008 |
| 7411304 |
Semiconductor interconnect having conductive spring contacts |
Aug. 12, 2008 |
| 7405485 |
Semiconductor device |
Jul. 29, 2008 |
| 7402442 |
Physically highly secure multi-chip assembly |
Jul. 22, 2008 |
| 7400035 |
Semiconductor device having multilayer printed wiring board |
Jul. 15, 2008 |
| 7397120 |
Semiconductor package structure for vertical mount and method |
Jul. 8, 2008 |
| 7378733 |
Composite flip-chip package with encased components and method of fabricating same |
May. 27, 2008 |
| 7375421 |
High density multilayer circuit module |
May. 20, 2008 |
| 7368813 |
Semiconductor device including semiconductor element surrounded by an insulating member and wiring structures on upper and lower surfaces of the semiconductor element and insulating member, an |
May. 6, 2008 |
| 7361987 |
Circuit device with at least partial packaging and method for forming |
Apr. 22, 2008 |
| 7358594 |
Method of forming a low k polymer E-beam printable mechanical support |
Apr. 15, 2008 |
| 7352054 |
Semiconductor device having conducting portion of upper and lower conductive layers |
Apr. 1, 2008 |
| 7345359 |
Integrated circuit package with chip-side signal connections |
Mar. 18, 2008 |
| 7332807 |
Chip package thermal interface materials with dielectric obstructions for body-biasing, methods of using same, and systems containing same |
Feb. 19, 2008 |
| 7291926 |
Multi-chip package structure |
Nov. 6, 2007 |
| 7285862 |
Electronic parts packaging structure in which a semiconductor chip is mounted on a wiring substrate and buried in an insulation film |
Oct. 23, 2007 |
| 7274095 |
Interposers with receptacles for receiving semiconductor devices and assemblies and packages including such interposers |
Sep. 25, 2007 |
| 7256496 |
Semiconductor device having adhesion increasing film to prevent peeling |
Aug. 14, 2007 |
| 7235885 |
Semiconductor device and method of manufacturing the same, circuit board and electronic device |
Jun. 26, 2007 |
| 7230332 |
Chip package with embedded component |
Jun. 12, 2007 |
| 7230342 |
Registration mark within an overlap of dopant regions |
Jun. 12, 2007 |
| 7227249 |
Three-dimensional stacked semiconductor package with chips on opposite sides of lead |
Jun. 5, 2007 |
| 7208825 |
Stacked semiconductor packages |
Apr. 24, 2007 |
| 7199459 |
Semiconductor package without bonding wires and fabrication method thereof |
Apr. 3, 2007 |
| 7196426 |
Multilayered substrate for semiconductor device |
Mar. 27, 2007 |
| 7129583 |
Multi-chip package structure |
Oct. 31, 2006 |
| 7112879 |
Microelectronic assemblies having compliant layers |
Sep. 26, 2006 |
| 7074696 |
Semiconductor circuit module and method for fabricating semiconductor circuit modules |
Jul. 11, 2006 |
| 7075181 |
Semiconductor package having semiconductor constructing body and method of manufacturing the same |
Jul. 11, 2006 |
| 7070851 |
Web process interconnect in electronic assemblies |
Jul. 4, 2006 |
| 7067356 |
Method of fabricating microelectronic package having a bumpless laminated interconnection layer |
Jun. 27, 2006 |
| 7064440 |
Semiconductor device |
Jun. 20, 2006 |
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