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Class Information
Number: 257/E23.174
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Packaging, interconnects, and markings for semiconductor or other solid-state devices (epo) > Arrangements for conducting electric current within device in operation from one component to another, interconnections, e.g., wires, lead frames (epo) > Interconnection structure between plurality of semiconductor chips being formed on or in insulating substrates (epo) > Conductive vias through substrate with or without pins, e.g., buried coaxial conductors (epo)
Description: This subclass is indented under subclass E23.169. This subclass is substantially the same in scope as ECLA classification H01L23/538E.










Patents under this class:
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Patent Number Title Of Patent Date Issued
8709865 Fabrication method of packaging substrate having through-holed interposer embedded therein Apr. 29, 2014
8709940 Structure of circuit board and method for fabricating the same Apr. 29, 2014
8710629 Apparatus and method for controlling semiconductor die warpage Apr. 29, 2014
8710676 Stacked structure and stacked method for three-dimensional chip Apr. 29, 2014
8704356 High temperature interconnect assemblies for high temperature electronics utilizing transition pads Apr. 22, 2014
8704375 Barrier structures and methods for through substrate vias Apr. 22, 2014
8704377 Compliant conductive nano-particle electrical interconnect Apr. 22, 2014
8692358 Image sensor chip package and method for forming the same Apr. 8, 2014
8692300 Interposer and method for forming the same Apr. 8, 2014
8679887 Method for manufacturing a micro-electro-mechanical device, in particular an optical microswitch, and micro-electro-mechanical device thus obtained Mar. 25, 2014
8674515 3D integrated circuits structure Mar. 18, 2014
8674518 Chip package and method for forming the same Mar. 18, 2014
8664768 Interposer having a defined through via pattern Mar. 4, 2014
8664772 Interface substrate with interposer Mar. 4, 2014
8653648 Zigzag pattern for TSV copper adhesion Feb. 18, 2014
8653671 System for relieving stress and improving heat management in a 3D chip stack Feb. 18, 2014
8653645 Semiconductor device comprising stacked LSI having circuit blocks connected by power supply and signal line through vias Feb. 18, 2014
8648470 Semiconductor device and method of forming FO-WLCSP with multiple encapsulants Feb. 11, 2014
8643190 Through substrate via including variable sidewall profile Feb. 4, 2014
8637995 Bonded semiconductor structures including two or more processed semiconductor structures carried by a common substrate Jan. 28, 2014
8633583 Semiconductor package substrate and methods for forming same, in particular for MEMS devices Jan. 21, 2014
8624394 Integrated technology for partial air gap low K deposition Jan. 7, 2014
8618640 Method of shielding through silicon vias in a passive interposer Dec. 31, 2013
8618651 Buried TSVs used for decaps Dec. 31, 2013
8610284 Semiconductor device and electronic device Dec. 17, 2013
8609535 Semiconductor package having through electrodes that reduce leakage current and method for manufacturing the same Dec. 17, 2013
8604593 Reconfiguring through silicon vias in stacked multi-die packages Dec. 10, 2013
8604594 Structures for preventing cross-talk between through-silicon vias and integrated circuits Dec. 10, 2013
8587132 Semiconductor package including an organic substrate and interposer having through-semiconductor vias Nov. 19, 2013
8575724 Semiconductor device having under-filled die in a die stack Nov. 5, 2013
8575725 Through-silicon vias for semicondcutor substrate and method of manufacture Nov. 5, 2013
8575745 Power semiconductor device, printed wiring board, and mechanism for connecting the power semiconductor device and the printed wiring board Nov. 5, 2013
8575763 Semiconductor device and method of manufacturing the same Nov. 5, 2013
8569880 Multilayer printed wiring board Oct. 29, 2013
8563430 Semiconductor integrated circuit and method for fabricating the same Oct. 22, 2013
8564133 Chip package and method for forming the same Oct. 22, 2013
8564137 System for relieving stress and improving heat management in a 3D chip stack having an array of inter-stack connections Oct. 22, 2013
8557677 Stack-type semiconductor device and method for manufacturing the same Oct. 15, 2013
8557699 Semiconductor device and manufacturing method thereof Oct. 15, 2013
8558395 Organic interface substrate having interposer with through-semiconductor vias Oct. 15, 2013
8546255 Method for forming vias in a semiconductor substrate and a semiconductor device having the semiconductor substrate Oct. 1, 2013
8541820 Semiconductor device including through-electrode Sep. 24, 2013
8531046 Semiconductor substrates comprising through substrate interconnects that are visible on the substrate backside Sep. 10, 2013
8525346 Compliant conductive nano-particle electrical interconnect Sep. 3, 2013
8518823 Through silicon via and method of forming the same Aug. 27, 2013
8519516 Semiconductor constructions Aug. 27, 2013
8513113 Methods of forming semiconductor constructions and assemblies Aug. 20, 2013
8502338 Through-substrate via waveguides Aug. 6, 2013
8487410 Through-silicon vias for semicondcutor substrate and method of manufacture Jul. 16, 2013
8482129 Wafer-level stack package and method of fabricating the same Jul. 9, 2013

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