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Class Information
Number: 257/E23.169
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Packaging, interconnects, and markings for semiconductor or other solid-state devices (epo) > Arrangements for conducting electric current within device in operation from one component to another, interconnections, e.g., wires, lead frames (epo) > Interconnection structure between plurality of semiconductor chips being formed on or in insulating substrates (epo)
Description: This subclass is indented under subclass E23.141. This subclass is substantially the same in scope as ECLA classification H01L23/538.

Sub-classes under this class:

Class Number Class Name Patents
257/E23.171 Adaptable interconnections, e.g., for engineering changes (epo) 234
257/E23.172 Assembly of plurality of insulating substrates (epo) 434
257/E23.178 Chips being integrally enclosed by interconnect and support structures (epo) 442
257/E23.174 Conductive vias through substrate with or without pins, e.g., buried coaxial conductors (epo) 460
257/E23.17 Crossover interconnections, e.g., bridge stepovers (epo) 94
257/E23.177 Flexible insulating substrates (epo) 315
257/E23.176 For flat cards, e.g., credit cards (epo) 83
257/E23.175 Geometry or layout of interconnection structure (epo) 287
257/E23.173 Multilayer substrates (epo) 454

Patents under this class:
1 2 3 4 5 6 7 8 9

Patent Number Title Of Patent Date Issued
8710652 Embedded package and method for manufacturing the same Apr. 29, 2014
8710676 Stacked structure and stacked method for three-dimensional chip Apr. 29, 2014
8704378 Semiconductor device Apr. 22, 2014
8692379 Integrated circuit connector access region Apr. 8, 2014
8685793 Chip assembly having via interconnects joined by plating Apr. 1, 2014
8642465 Method for manufacturing and making planar contact with an electronic apparatus, and correspondingly manufactured apparatus Feb. 4, 2014
8629564 Semiconductor electronic component and semiconductor device using the same Jan. 14, 2014
8623704 Adhesive/spacer island structure for multiple die package Jan. 7, 2014
8624374 Semiconductor device packages with fan-out and with connecting elements for stacking and manufacturing methods thereof Jan. 7, 2014
8618637 Semiconductor package using through-electrodes having voids Dec. 31, 2013
8610261 Power semiconductor device Dec. 17, 2013
8610276 Metal cap for back end of line (BEOL) interconnects, design structure and method of manufacture Dec. 17, 2013
8598032 Reduced number of masks for IC device with stacked contact levels Dec. 3, 2013
8592950 Semiconductor device and method of forming through vias with reflowed conductive material Nov. 26, 2013
8587102 Vertical system integration Nov. 19, 2013
8587123 Multi-chip and multi-substrate reconstitution based packaging Nov. 19, 2013
8581389 Uniformity control for IC passivation structure Nov. 12, 2013
8581361 Semiconductor apparatus Nov. 12, 2013
8580682 Cost-effective TSV formation Nov. 12, 2013
8574960 Semiconductor device and method of forming cavity adjacent to sensitive region of semiconductor die using wafer-level underfill material Nov. 5, 2013
8575763 Semiconductor device and method of manufacturing the same Nov. 5, 2013
8563419 Method of manufacturing an interconnect structure and design structure thereof Oct. 22, 2013
8564091 Die-to-die electrical isolation in a semiconductor package Oct. 22, 2013
8551813 Wafer level IC assembly method Oct. 8, 2013
8552551 Adhesive/spacer island structure for stacking over wire bonded die Oct. 8, 2013
8552559 Very thick metal interconnection scheme in IC chips Oct. 8, 2013
8536670 Semiconductor device, manufacturing method therefor, and electronic apparatus Sep. 17, 2013
8531027 Press-pack module with power overlay interconnection Sep. 10, 2013
8525322 Semiconductor package having a plurality of input/output members Sep. 3, 2013
8513796 Package structure, fabricating method thereof, and package-on-package device thereby Aug. 20, 2013
8502375 Corrugated die edge for stacked die semiconductor package Aug. 6, 2013
8502385 Power semiconductor device Aug. 6, 2013
8492890 Semiconductor device and method for manufacturing thereof Jul. 23, 2013
8487433 Semiconductor device Jul. 16, 2013
8470710 Methods of forming a metal pattern Jun. 25, 2013
8456020 Semiconductor package and method of manufacturing the same Jun. 4, 2013
8455995 TSVs with different sizes in interposers for bonding dies Jun. 4, 2013
8455992 Semiconductor package and method of fabricating the same Jun. 4, 2013
8446016 Chip stack package May. 21, 2013
8441111 Stub minimization for multi-die wirebond assemblies with parallel windows May. 14, 2013
8436457 Stub minimization for multi-die wirebond assemblies with parallel windows May. 7, 2013
8426980 Chip-to-chip multi-signaling communication system with common conductive layer Apr. 23, 2013
8426979 Composite layered chip package Apr. 23, 2013
8426941 Semiconductor chip comprising a directional coupler having a specific main line and sub-line arrangement Apr. 23, 2013
8415203 Method of forming a semiconductor package including two devices Apr. 9, 2013
8384203 Packaging structural member Feb. 26, 2013
8377746 Integrated circuit stacked package precursors and stacked packaged devices and systems therefrom Feb. 19, 2013
8378481 Semiconductor module with micro-buffers Feb. 19, 2013
8373278 Semiconductor device having stacked dice disposed on base substrate Feb. 12, 2013
8373268 Semiconductor package including flip chip controller at bottom of die stack Feb. 12, 2013

1 2 3 4 5 6 7 8 9

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