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Class Information
Number: 257/E23.146
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Packaging, interconnects, and markings for semiconductor or other solid-state devices (epo) > Arrangements for conducting electric current within device in operation from one component to another, interconnections, e.g., wires, lead frames (epo) > Including external interconnections consisting of multilayer structure of conductive and insulating layers inseparably formed on semiconductor body (epo) > With adaptable interconnections (epo)
Description: This subclass is indented under subclass E23.142. This subclass is substantially the same in scope as ECLA classification H01L23/525.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7579681 |
Super high density module with integrated wafer level packages |
Aug. 25, 2009 |
| 7576440 |
Semiconductor chip having bond pads and multi-chip package |
Aug. 18, 2009 |
| 7566575 |
Mounting circuit and method for producing semiconductor-chip-mounting circuit |
Jul. 28, 2009 |
| 7553755 |
Method for symmetric deposition of metal layer |
Jun. 30, 2009 |
| 7554201 |
Tin-bismuth (Sn-Bi) family alloy solder and semiconductor device using the same |
Jun. 30, 2009 |
| 7547977 |
Semiconductor chip having bond pads |
Jun. 16, 2009 |
| 7541682 |
Semiconductor chip having bond pads |
Jun. 2, 2009 |
| 7508059 |
Stacked chip package with redistribution lines |
Mar. 24, 2009 |
| 7466031 |
Structure and method of forming metal buffering layer |
Dec. 16, 2008 |
| 7453159 |
Semiconductor chip having bond pads |
Nov. 18, 2008 |
| 7432585 |
Semiconductor device electronic component, circuit board, and electronic device |
Oct. 7, 2008 |
| 7368803 |
System and method for protecting microelectromechanical systems array using back-plate with non-flat portion |
May. 6, 2008 |
| 7291922 |
Substrate with many via contact means disposed therein |
Nov. 6, 2007 |
| 7271486 |
Retarding agglomeration of Ni monosilicide using Ni alloys |
Sep. 18, 2007 |
| 7199458 |
Stacked offset semiconductor package and method for fabricating |
Apr. 3, 2007 |
| 7148578 |
Semiconductor multi-chip package |
Dec. 12, 2006 |
| 7109585 |
Junction interconnection structures |
Sep. 19, 2006 |
| 7074707 |
Method of fabricating a connection device |
Jul. 11, 2006 |
| 7067426 |
Semiconductor processing methods |
Jun. 27, 2006 |
| 7064344 |
Barrier material encapsulation of programmable material |
Jun. 20, 2006 |
| 7064409 |
Structure and programming of laser fuse |
Jun. 20, 2006 |
| 7064434 |
Customized microelectronic device and method for making customized electrical interconnections |
Jun. 20, 2006 |
| 7033860 |
Process for manufacturing semiconductor device |
Apr. 25, 2006 |
| 7023088 |
Semiconductor package, semiconductor device and electronic device |
Apr. 4, 2006 |
| 7010766 |
Parallel design processes for integrated circuits |
Mar. 7, 2006 |
| 6999332 |
Semiconductor package with a controlled impedance bus and method of forming same |
Feb. 14, 2006 |
| 6991970 |
Method and apparatus for circuit completion through the use of ball bonds or other connections during the formation of semiconductor device |
Jan. 31, 2006 |
| 6989595 |
Molds configured to pattern masses associated with semiconductor constructions |
Jan. 24, 2006 |
| 6982227 |
Single and multilevel rework |
Jan. 3, 2006 |
| 6972445 |
Input/output structure and integrated circuit using the same |
Dec. 6, 2005 |
| 6962867 |
Methods of fabrication of semiconductor dice having back side redistribution layer accessed using through-silicon vias and assemblies thereof |
Nov. 8, 2005 |
| 6953956 |
Semiconductor device having borderless logic array and flexible I/O |
Oct. 11, 2005 |
| 6952048 |
Semiconductor device with improved design freedom of external terminal |
Oct. 4, 2005 |
| 6933617 |
Wafer interposer assembly |
Aug. 23, 2005 |
| 6903390 |
Single metal programmability in a customizable integrated circuit device |
Jun. 7, 2005 |
| 6879605 |
Method and apparatus for performing pattern defect repair using Q-switched mode-locked pulse laser |
Apr. 12, 2005 |
| 6867123 |
Semiconductor integrated circuit device and its manufacturing method |
Mar. 15, 2005 |
| 6864587 |
Semiconductor device |
Mar. 8, 2005 |
| 6856025 |
Chip and wafer integration process using vertical connections |
Feb. 15, 2005 |
| 6854179 |
Modification of circuit features that are interior to a packaged integrated circuit |
Feb. 15, 2005 |
| 6844608 |
Reversible field-programmable electric interconnects |
Jan. 18, 2005 |
| 6841884 |
Semiconductor device |
Jan. 11, 2005 |
| 6838773 |
Semiconductor chip and semiconductor device using the semiconductor chip |
Jan. 4, 2005 |
| 6835595 |
Semiconductor package, semiconductor device, electronic device, and method of manufacturing semiconductor package |
Dec. 28, 2004 |
| 6835605 |
Method for providing and utilizing rerouting resources |
Dec. 28, 2004 |
| 6818996 |
Multi-level redistribution layer traces for reducing current crowding in flipchip solder bumps |
Nov. 16, 2004 |
| 6812532 |
Semiconductor device with address programming circuit |
Nov. 2, 2004 |
| 6803612 |
Integrated circuit having electrical connecting elements |
Oct. 12, 2004 |
| 6800930 |
Semiconductor dice having back side redistribution layer accessed using through-silicon vias, and assemblies |
Oct. 5, 2004 |
| 6797999 |
Flexible routing channels among vias |
Sep. 28, 2004 |
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