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Class Information
Number: 257/E23.123
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Packaging, interconnects, and markings for semiconductor or other solid-state devices (epo) > Encapsulations, e.g., encapsulating layers, coatings, e.g., for protection (epo) > Characterized by arrangement or shape (epo)
Description: This subclass is indented under subclass E23.116. This subclass is substantially the same in scope as ECLA classification H01L23/31.
Sub-classes under this class:
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7622311 |
Inspection of underfill in integrated circuit package |
Nov. 24, 2009 |
| 7598622 |
Encapsulation of a chip module |
Oct. 6, 2009 |
| 7576412 |
Wafer with improved sawing loops |
Aug. 18, 2009 |
| 7566978 |
Semiconductor device and programming method |
Jul. 28, 2009 |
| 7554167 |
Three-dimensional analog input control device |
Jun. 30, 2009 |
| 7514350 |
Electronic device and method of manufacturing the same, circuit board, and electronic instrument |
Apr. 7, 2009 |
| 7476952 |
Semiconductor input control device |
Jan. 13, 2009 |
| 7473996 |
Signal transfer film, display apparatus having the same and method of manufacturing the same |
Jan. 6, 2009 |
| 7449726 |
Power semiconductor apparatus |
Nov. 11, 2008 |
| 7439598 |
Microelectronic imaging units |
Oct. 21, 2008 |
| 7429794 |
Multi-chip packaged integrated circuit device for transmitting signals from one chip to another chip |
Sep. 30, 2008 |
| 7408264 |
SMT passive device noflow underfill methodology and structure |
Aug. 5, 2008 |
| 7375419 |
Stacked mass storage flash memory package |
May. 20, 2008 |
| 7361984 |
Chip package structure |
Apr. 22, 2008 |
| 7342296 |
Wafer street buffer layer |
Mar. 11, 2008 |
| 7285867 |
Wiring structure on semiconductor substrate and method of fabricating the same |
Oct. 23, 2007 |
| 7262506 |
Stacked mass storage flash memory package |
Aug. 28, 2007 |
| 7205658 |
Singulation method used in leadless packaging process |
Apr. 17, 2007 |
| 7196410 |
Wafer packaging and singulation method |
Mar. 27, 2007 |
| 7151014 |
Underfilling process in a molded matrix array package using flow front modifying solder resist |
Dec. 19, 2006 |
| 7119449 |
Enhancement of underfill physical properties by the addition of thermotropic cellulose |
Oct. 10, 2006 |
| 7109592 |
SMT passive device noflow underfill methodology and structure |
Sep. 19, 2006 |
| 6809406 |
COF tape carrier, semiconductor element, COF semiconductor device, and method for manufacturing of COF semiconductor device |
Oct. 26, 2004 |
| 6717279 |
Semiconductor device with recessed portion in the molding resin |
Apr. 6, 2004 |
| 6620706 |
Condensed memory matrix |
Sep. 16, 2003 |
| 6593665 |
Protective envelope for a semiconductor integrated circuit |
Jul. 15, 2003 |
| 6433417 |
Electronic component having improved soldering performance and adhesion properties of the lead wires |
Aug. 13, 2002 |
| 6396159 |
Semiconductor device |
May. 28, 2002 |
| 6365976 |
Integrated circuit device with depressions for receiving solder balls and method of fabrication |
Apr. 2, 2002 |
| 6307262 |
Condensed memory matrix |
Oct. 23, 2001 |
| 6133630 |
Condensed memory matrix |
Oct. 17, 2000 |
| 6071757 |
Condensed memory matrix |
Jun. 6, 2000 |
| 5978227 |
Integrated circuit packages having an externally mounted lead frame having bifurcated distal lead ends |
Nov. 2, 1999 |
| 5977629 |
Condensed memory matrix |
Nov. 2, 1999 |
| 5945692 |
Semiconductor device and method of fabricating same |
Aug. 31, 1999 |
| 5905305 |
Condensed memory matrix |
May. 18, 1999 |
| 5864175 |
Wrap-resistant ultra-thin integrated circuit package fabrication method |
Jan. 26, 1999 |
| 5843807 |
Method of manufacturing an ultra-high density warp-resistant memory module |
Dec. 1, 1998 |
| 5828125 |
Ultra-high density warp-resistant memory module |
Oct. 27, 1998 |
| 5801437 |
Three-dimensional warp-resistant integrated circuit module method and apparatus |
Sep. 1, 1998 |
| 5644161 |
Ultra-high density warp-resistant memory module |
Jul. 1, 1997 |
| 5600181 |
Hermetically sealed high density multi-chip package |
Feb. 4, 1997 |
| 5581121 |
Warp-resistant ultra-thin integrated circuit package |
Dec. 3, 1996 |
| 5369056 |
Warp-resistent ultra-thin integrated circuit package fabrication method |
Nov. 29, 1994 |
| 5369058 |
Warp-resistent ultra-thin integrated circuit package fabrication method |
Nov. 29, 1994 |
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