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Class Information
Number: 257/E23.07
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Packaging, interconnects, and markings for semiconductor or other solid-state devices (epo) > Arrangements for conducting electric current to or from solid-state body in operation, e.g., leads, terminal arrangements (epo) > Consisting of soldered or bonded constructions (epo) > Leads, i.e., metallizations or lead frames on insulating substrates, e.g., chip carriers (epo) > Geometry or layout (epo)
Description: This subclass is indented under subclass E23.06. This subclass is substantially the same in scope as ECLA classification H01L23/498G.










Sub-classes under this class:

Class Number Class Name Patents
257/E23.071 For devices adapted for rectifying, amplifying, oscillating, or switching, capacitors, or resistors with at least one potential-jump barrier or surface barrier (epo) 41


Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

Patent Number Title Of Patent Date Issued
8704369 Flip chip bump structure and fabrication method Apr. 22, 2014
8664044 Method of fabricating land grid array semiconductor package Mar. 4, 2014
8659131 Structure for multi-row lead frame and semiconductor package capable of minimizing an under-cut Feb. 25, 2014
8643149 Stress barrier structures for semiconductor chips Feb. 4, 2014
8637391 Flip chip semiconductor assembly with variable volume solder bumps Jan. 28, 2014
8618608 Lateral silicon controlled rectifier structure Dec. 31, 2013
8618678 Chip structure and chip package structure Dec. 31, 2013
8610285 3D IC packaging structures and methods with a metal pillar Dec. 17, 2013
8598702 Semiconductor package Dec. 3, 2013
8598048 Integrated circuit package including a direct connect pad, a blind via, and a bond pad electrically coupled to the direct connect pad Dec. 3, 2013
8586857 Combined diode, lead assembly incorporating an expansion joint Nov. 19, 2013
8587099 Leadframe having selective planishing Nov. 19, 2013
8580672 Methods of forming bump structures that include a protection layer Nov. 12, 2013
8546945 Pillar structure having a non-planar surface for semiconductor devices Oct. 1, 2013
8513794 Stacked assembly including plurality of stacked microelectronic elements Aug. 20, 2013
8450841 Bonded wire semiconductor device May. 28, 2013
8436477 Stub minimization using duplicate sets of signal terminals in assemblies without wirebonds to package substrate May. 7, 2013
8426963 Power semiconductor package structure and manufacturing method thereof Apr. 23, 2013
8405207 Stub minimization for wirebond assemblies without windows Mar. 26, 2013
8405231 Semiconductor device, manufacturing method thereof, and manufacturing method of semiconductor module Mar. 26, 2013
8400440 Display device Mar. 19, 2013
8400779 Semiconductor package having multi pitch ball land Mar. 19, 2013
8390116 Flip chip bump structure and fabrication method Mar. 5, 2013
8384229 Semiconductor device and method for manufacturing the same Feb. 26, 2013
8372729 Integrated circuit devices with ESD protection in scribe line, and methods for fabricating same Feb. 12, 2013
8373276 Printed wiring board and method for manufacturing the same Feb. 12, 2013
8368220 Anchored damascene structures Feb. 5, 2013
8357998 Wirebonded semiconductor package Jan. 22, 2013
8344497 Semiconductor package and electronic device having the same Jan. 1, 2013
8338946 Semiconductor module, method of manufacturing semiconductor module, and mobile device Dec. 25, 2012
8318596 Pillar structure having a non-planar surface for semiconductor devices Nov. 27, 2012
8304903 Wirebond-less semiconductor package Nov. 6, 2012
8304890 Semiconductor device Nov. 6, 2012
8304885 Semiconductor device and electronic apparatus equipped with the semiconductor device Nov. 6, 2012
8278764 Stub minimization for multi-die wirebond assemblies with orthogonal windows Oct. 2, 2012
8268671 Semiconductor system-in-package and methods for making the same Sep. 18, 2012
8269322 Tape wiring substrate and tape package using the same Sep. 18, 2012
RE43607 Method and apparatus for evaluating a known good die using both wire bond and flip-chip interconnects Aug. 28, 2012
8237276 Bump structure and fabrication method thereof Aug. 7, 2012
8227916 Package structure and method for reducing dielectric layer delamination Jul. 24, 2012
8217269 Electrical microfilament to circuit interface Jul. 10, 2012
8207611 Semiconductor device and fabrication method thereof Jun. 26, 2012
8203200 Diode leadframe for solar module assembly Jun. 19, 2012
8174097 Electric sub-assembly May. 8, 2012
8169088 Power converter integrated circuit floor plan and package May. 1, 2012
8125009 Mounting circuit substrate Feb. 28, 2012
8110905 Integrated circuit packaging system with leadframe interposer and method of manufacture thereof Feb. 7, 2012
8102062 Optionally bonding either two sides or more sides of integrated circuits Jan. 24, 2012
8080883 Wiring placement method of wirings having different length and semiconductor integrated circuit device Dec. 20, 2011
8076787 Semiconductor device, manufacturing method thereof, and manufacturing method of semiconductor module Dec. 13, 2011

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