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Class Information
Number: 257/E23.067
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Packaging, interconnects, and markings for semiconductor or other solid-state devices (epo) > Arrangements for conducting electric current to or from solid-state body in operation, e.g., leads, terminal arrangements (epo) > Consisting of soldered or bonded constructions (epo) > Leads, i.e., metallizations or lead frames on insulating substrates, e.g., chip carriers (epo) > Via connections through substrates, e.g., pins going through substrate, coaxial cables (epo)
Description: This subclass is indented under subclass E23.06. This subclass is substantially the same in scope as ECLA classification H01L23/498E.










Patents under this class:

Patent Number Title Of Patent Date Issued
8710669 Semiconductor device manufacture in which minimum wiring pitch of connecting portion wiring layer is less than minimum wiring pitch of any other wiring layer Apr. 29, 2014
8710649 Wafer level package and fabrication method Apr. 29, 2014
8704376 Layout of memory strap cell Apr. 22, 2014
8686569 Die arrangement and method of forming a die arrangement Apr. 1, 2014
8686545 Semiconductor device and method for manufacturing the same Apr. 1, 2014
8679887 Method for manufacturing a micro-electro-mechanical device, in particular an optical microswitch, and micro-electro-mechanical device thus obtained Mar. 25, 2014
8659144 Power and ground planes in package substrate Feb. 25, 2014
8653648 Zigzag pattern for TSV copper adhesion Feb. 18, 2014
8643155 Liquid crystal display and chip on film thereof Feb. 4, 2014
8643147 Seal ring structure with improved cracking protection and reduced problems Feb. 4, 2014
8633595 Semiconductor device having groove-shaped via-hole Jan. 21, 2014
8633594 Semiconductor device having groove-shaped via-hole Jan. 21, 2014
8633583 Semiconductor package substrate and methods for forming same, in particular for MEMS devices Jan. 21, 2014
8618648 Methods for flip chip stacking Dec. 31, 2013
8618539 Interconnect sensor for detecting delamination Dec. 31, 2013
8610264 Compliant interconnects in wafers Dec. 17, 2013
8604594 Structures for preventing cross-talk between through-silicon vias and integrated circuits Dec. 10, 2013
8598666 Semiconductor structure and method for manufacturing the same Dec. 3, 2013
8598048 Integrated circuit package including a direct connect pad, a blind via, and a bond pad electrically coupled to the direct connect pad Dec. 3, 2013
8592981 Via structure and method thereof Nov. 26, 2013
8581395 Hybrid integrated circuit device and electronic device Nov. 12, 2013
8580682 Cost-effective TSV formation Nov. 12, 2013
8569880 Multilayer printed wiring board Oct. 29, 2013
8557639 Apparatus for thermally enhanced semiconductor package Oct. 15, 2013
8552563 Three-dimensional semiconductor architecture Oct. 8, 2013
8546953 Through silicon via (TSV) isolation structures for noise reduction in 3D integrated circuit Oct. 1, 2013
8519528 Semiconductor structure and method for interconnection of integrated circuits Aug. 27, 2013
8519516 Semiconductor constructions Aug. 27, 2013
8519515 TSV structure and method for forming the same Aug. 27, 2013
8518787 Through wafer vias and method of making same Aug. 27, 2013
8508034 Electronic devices Aug. 13, 2013
8502386 Vertically tapered transmission line for optimal signal transition in high-speed multi-layer ball grid array packages Aug. 6, 2013
8502338 Through-substrate via waveguides Aug. 6, 2013
8487422 Chip stack with conductive column through electrically insulated semiconductor region Jul. 16, 2013
8482291 Substrate structure Jul. 9, 2013
8482130 Interconnect structure comprising blind vias intended to be metalized Jul. 9, 2013
8482116 Semiconductor device having stacked components Jul. 9, 2013
8471367 Semiconductor device and method for manufacturing semiconductor device Jun. 25, 2013
8466547 Method for manufacturing substrate for semiconductor element, and semiconductor device Jun. 18, 2013
8456021 Integrated circuit device having die bonded to the polymer side of a polymer substrate Jun. 4, 2013
8456018 Semiconductor packages Jun. 4, 2013
8456017 Filled through-silicon via with conductive composite material Jun. 4, 2013
8455995 TSVs with different sizes in interposers for bonding dies Jun. 4, 2013
8455984 Integrated circuit structure and method of forming the same Jun. 4, 2013
8450843 Semiconductor device and method for designing the same May. 28, 2013
8440554 Through via connected backside embedded circuit features structure and method May. 14, 2013
8436468 Semiconductor device having a through electrode May. 7, 2013
8436448 Through-silicon via with air gap May. 7, 2013
8431438 Forming in-situ micro-feature structures with coreless packages Apr. 30, 2013
8421193 Integrated circuit device having through via and method for preparing the same Apr. 16, 2013











 
 
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