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Class Information
Number: 257/E23.039
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Packaging, interconnects, and markings for semiconductor or other solid-state devices (epo) > Arrangements for conducting electric current to or from solid-state body in operation, e.g., leads, terminal arrangements (epo) > Consisting of soldered or bonded constructions (epo) > Lead frames or other flat leads (epo) > Characterized by die pad (epo) > Chip-on-leads or leads-on-chip techniques, i.e., inner lead fingers being used as die pad (epo)
Description: This subclass is indented under subclass E23.037. This subclass is substantially the same in scope as ECLA classification H01L23/495A4.

Patents under this class:

Patent Number Title Of Patent Date Issued
6724074 Stack semiconductor chip package and lead frame Apr. 20, 2004
6719550 Apparatus for epoxy loc die attachment Apr. 13, 2004
6720208 Semiconductor device Apr. 13, 2004
6715659 Apparatus for clamping semiconductor devices using sliding finger supports Apr. 6, 2004
6716668 Method for forming semiconductor device Apr. 6, 2004
6716670 Method of forming a three-dimensional stacked semiconductor package device Apr. 6, 2004
6713851 Lead over chip semiconductor device including a heat sink for heat dissipation Mar. 30, 2004
6709967 Laser wire bonding for wire embedded dielectrics to integrated circuits Mar. 23, 2004
6710462 Method of pressure curing for reducing voids in a die attach bondline and applications thereof Mar. 23, 2004
6707147 Substrates and assemblies including pre-applied adhesion promoter Mar. 16, 2004
6706559 Method of attaching a leadframe to singulated semiconductor dice Mar. 16, 2004
6703075 Wafer treating method for making adhesive dies Mar. 9, 2004
6703691 Quad flat non-leaded semiconductor package and method of fabricating the same Mar. 9, 2004
6699734 Method and apparatus for coupling a semiconductor die to die terminals Mar. 2, 2004
6700210 Electronic assemblies containing bow resistant semiconductor packages Mar. 2, 2004
6691406 Methods of die attachment for BOC and F/C surface mount Feb. 17, 2004
6693349 Semiconductor chip package having a leadframe with a footprint of about the same size as the chip Feb. 17, 2004
6689638 Substrate-on-chip packaging process Feb. 10, 2004
6686268 Method of forming overmolded chip scale package and resulting product Feb. 3, 2004
6683388 Method and apparatus for packaging a microelectronic die Jan. 27, 2004
6680213 Method and system for fabricating contacts on semiconductor components Jan. 20, 2004
6680531 Multi-chip semiconductor package Jan. 20, 2004
6677675 Microelectronic devices and microelectronic die packages Jan. 13, 2004
6673650 Multi chip semiconductor package and method of construction Jan. 6, 2004
6674158 Semiconductor die package having a UV cured polymeric die coating Jan. 6, 2004
6670550 Underfill coating for LOC package Dec. 30, 2003
6667556 Flip chip adaptor package for bare die Dec. 23, 2003
6667560 Board on chip ball grid array Dec. 23, 2003
6662993 Bondhead lead clamp apparatus Dec. 16, 2003
6664139 Method and apparatus for packaging a microelectronic die Dec. 16, 2003
6664649 Lead-on-chip type of semiconductor package with embedded heat sink Dec. 16, 2003
6658734 Method of manufacturing a circuit member for a resin-sealed semiconductor device Dec. 9, 2003
6657288 Compression layer on the lead frame to reduce stress defects Dec. 2, 2003
6653721 LOC semiconductor assembled with room temperature adhesive Nov. 25, 2003
6653173 Method and apparatus for packaging a microelectronic die Nov. 25, 2003
6650005 Micro BGA package Nov. 18, 2003
6650012 Semiconductor device Nov. 18, 2003
6646334 Stacked semiconductor package and fabricating method thereof Nov. 11, 2003
6645844 Methods for high density direct connect LOC assembly Nov. 11, 2003
6642627 Semiconductor chip having bond pads and multi-chip package Nov. 4, 2003
6642735 Semiconductor package for chip with testing contact pad connected to outside Nov. 4, 2003
6639308 Near chip size semiconductor package Oct. 28, 2003
6635954 Stress reduction feature for LOC lead frame Oct. 21, 2003
6630372 Method for routing die interconnections using intermediate connection elements secured to the die face Oct. 7, 2003
6630732 Lead frames including inner-digitized bond fingers on bus bars and semiconductor device package including same Oct. 7, 2003
6626222 System for fabricating semiconductor components Sep. 30, 2003
6624006 Methods of attaching a semiconductor chip to a leadframe with a footprint of about the same size as the chip Sep. 23, 2003
6623592 Methods for application of adhesive tape to semiconductor devices Sep. 23, 2003
6620648 Multi-chip module with extension Sep. 16, 2003
6621150 Lead frame adaptable to the trend of IC packaging Sep. 16, 2003

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