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Class Information
Number: 257/E23.029
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Packaging, interconnects, and markings for semiconductor or other solid-state devices (epo) > Arrangements for conducting electric current to or from solid-state body in operation, e.g., leads, terminal arrangements (epo) > Consisting of soldered or bonded constructions (epo) > Bases or plates or solder therefor (epo) > Characterized by material (epo) > Semiconductor (epo)
Description: This subclass is indented under subclass E23.028. This subclass is substantially the same in scope as ECLA classification H01L23/492M2.










Patents under this class:

Patent Number Title Of Patent Date Issued
8247836 Nickel tin bonding system with barrier layer for semiconductor wafers and devices Aug. 21, 2012
8211752 Device and method including a soldering process Jul. 3, 2012
7993961 Layout structure in semiconductor memory device comprising global word lines, local word lines, global bit lines and local bit lines Aug. 9, 2011
7443032 Memory device with chemical vapor deposition of titanium for titanium silicide contacts Oct. 28, 2008
5365405 Multi-chip module Nov. 15, 1994
4885630 High power multi-layer semiconductive switching device having multiple parallel contacts with improved forward voltage drop Dec. 5, 1989
4680619 Semiconductor device having silicon conductor tracks connected by a metal silicide track Jul. 14, 1987
4646126 Semiconductor device Feb. 24, 1987
4476483 Semiconductor device having a doped amorphous silicon adhesive layer Oct. 9, 1984
4352120 Semiconductor device using SiC as supporter of a semiconductor element Sep. 28, 1982
4261781 Process for forming compound semiconductor bodies Apr. 14, 1981











 
 
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