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Class Information
Number: 257/E23.019
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Packaging, interconnects, and markings for semiconductor or other solid-state devices (epo) > Arrangements for conducting electric current to or from solid-state body in operation, e.g., leads, terminal arrangements (epo) > Consisting of lead-in layers inseparably applied to semiconductor body (epo) > Consisting of layered constructions comprising conductive layers and insulating layers, e.g., planar contacts (epo)
Description: This subclass is indented under subclass E23.012. This subclass is substantially the same in scope as ECLA classification H01L23/485.

Sub-classes under this class:

Class Number Class Name Patents
257/E23.02 Bonding areas, e.g., pads (epo) 1,264
257/E23.021 Bump or ball contacts (epo) 2,068
257/E23.022 Overhang structure (epo) 39

Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

Patent Number Title Of Patent Date Issued
6458700 Integrated circuitry fabrication method of making a conductive electrical connection Oct. 1, 2002
6458710 Process for forming uniform multiple contact holes Oct. 1, 2002
6458651 Method of forming a capacitor and an electrical connection thereto Oct. 1, 2002
6455410 Semiconductor device and method of manufacturing the same Sep. 24, 2002
6455412 Semiconductor contact via structure and method Sep. 24, 2002
6455935 Asymmetric, double-sided self-aligned silicide Sep. 24, 2002
6451651 Method of manufacturing DRAM device invention Sep. 17, 2002
6448656 System including a memory device having a semiconductor connection with a top surface having an enlarged recess Sep. 10, 2002
6448657 Structure for reducing junction spiking through a wall surface of an overetched contact via Sep. 10, 2002
6448651 Semiconductor device having a multi-level metallization and its fabricating method Sep. 10, 2002
6444530 Process for fabricating an integrated circuit with a self-aligned contact Sep. 3, 2002
6445023 Mixed metal nitride and boride barrier layers Sep. 3, 2002
6444515 Method of fabricating a semiconductor device Sep. 3, 2002
6445050 Symmetric device with contacts self aligned to gate Sep. 3, 2002
6440851 Method and structure for controlling the interface roughness of cobalt disilicide Aug. 27, 2002
6440850 Structure for an electrical contact to a thin film in a semiconductor structure and method for making the same Aug. 27, 2002
6441418 Spacer narrowed, dual width contact for charge gain reduction Aug. 27, 2002
6440848 Interconnection of a semiconductor device and a method of forming thereof Aug. 27, 2002
6437421 Self-aligned dual-base semiconductor process and structure incorporating multiple bipolar device types Aug. 20, 2002
6433435 Aluminum contact structure for integrated circuits Aug. 13, 2002
6433419 Face-up semiconductor chip assemblies Aug. 13, 2002
6429493 Semiconductor device and method for manufacturing semiconductor device Aug. 6, 2002
6429520 Semiconductor component with silicon wiring and method of fabricating the component Aug. 6, 2002
6429526 Method for forming a semiconductor connection with a top surface having an enlarged recess Aug. 6, 2002
6426287 Method for forming a semiconductor connection with a top surface having an enlarged recess Jul. 30, 2002
6426558 Metallurgy for semiconductor devices Jul. 30, 2002
6426247 Low bitline capacitance structure and method of making same Jul. 30, 2002
6423626 Removal of metal cusp for improved contact fill Jul. 23, 2002
6414374 Semiconductor device including edge bond pads and methods Jul. 2, 2002
6410984 Conductive structure in an integrated circuit Jun. 25, 2002
6410986 Multi-layered titanium nitride barrier structure Jun. 25, 2002
6407452 Integrated circuitry and method of restricting diffusion from one material to another Jun. 18, 2002
6407464 Semiconductor device Jun. 18, 2002
6403422 Semiconductor device and method of manufacturing the same Jun. 11, 2002
6403402 Semiconductor chip having an underplate metal layer Jun. 11, 2002
6404055 Semiconductor device with improved metal interconnection and method for forming the metal interconnection Jun. 11, 2002
6399512 Method of making metallization and contact structures in an integrated circuit comprising an etch stop layer Jun. 4, 2002
6396110 Semiconductor device with multiple emitter contact plugs May. 28, 2002
6395454 Integrated electrical circuit with passivation layer May. 28, 2002
6392306 Semiconductor chip assembly with anisotropic conductive adhesive connections May. 21, 2002
6383869 Side wall contact structure and method of forming the same May. 7, 2002
6383821 Semiconductor device and process May. 7, 2002
6384481 Single step electroplating process for interconnect via fill and metal line patterning May. 7, 2002
6379999 Semiconductor device and method of manufacturing the same Apr. 30, 2002
6380079 Metal wiring in semiconductor device and method for fabricating the same Apr. 30, 2002
6372527 Methods of making semiconductor chip assemblies Apr. 16, 2002
6369441 Method of producing a semiconductor chip having an underplate metal layer Apr. 9, 2002
6365440 Method for contacting a circuit chip Apr. 2, 2002
6359307 Method for forming self-aligned contacts and interconnection lines using dual damascene techniques Mar. 19, 2002
6352916 Method of forming plugs in multi-level interconnect structures by partially removing conductive material from a trench Mar. 5, 2002

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

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