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Class Information
Number: 257/E23.019
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Packaging, interconnects, and markings for semiconductor or other solid-state devices (epo) > Arrangements for conducting electric current to or from solid-state body in operation, e.g., leads, terminal arrangements (epo) > Consisting of lead-in layers inseparably applied to semiconductor body (epo) > Consisting of layered constructions comprising conductive layers and insulating layers, e.g., planar contacts (epo)
Description: This subclass is indented under subclass E23.012. This subclass is substantially the same in scope as ECLA classification H01L23/485.

Sub-classes under this class:

Class Number Class Name Patents
257/E23.02 Bonding areas, e.g., pads (epo) 1,264
257/E23.021 Bump or ball contacts (epo) 2,068
257/E23.022 Overhang structure (epo) 39

Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

Patent Number Title Of Patent Date Issued
5262352 Method for forming an interconnection structure for conductive layers Nov. 16, 1993
5258330 Semiconductor chip assemblies with fan-in leads Nov. 2, 1993
5250760 Semiconductor device Oct. 5, 1993
5246883 Semiconductor contact via structure and method Sep. 21, 1993
5246882 Method for embodying an electric circuit on an active element of an MIS integrated circuit Sep. 21, 1993
5243220 Semiconductor device having miniaturized contact electrode and wiring structure Sep. 7, 1993
5240872 Method of manufacturing semiconductor device having interconnection layer contacting source/drain regions Aug. 31, 1993
5236852 Method for contacting a semiconductor device Aug. 17, 1993
5236870 Method of making a semiconductor integrated circuit utilizing insulators which react distinctly from each other Aug. 17, 1993
5233224 Electrode having an improved configuration for a semiconductor element Aug. 3, 1993
5231052 Process for forming a multilayer polysilicon semiconductor electrode Jul. 27, 1993
5229307 Method of making extended silicide and external contact Jul. 20, 1993
5229326 Method for making electrical contact with an active area through sub-micron contact openings and a semiconductor device Jul. 20, 1993
5227316 Method of forming self aligned extended base contact for a bipolar transistor having reduced cell size Jul. 13, 1993
5221634 Method of making semiconductor device employing self diffusion of dopant from contact member for augmenting electrical connection to doped region in substrate Jun. 22, 1993
5219787 Trenching techniques for forming channels, vias and components in substrates Jun. 15, 1993
5216276 Semiconductor integrated circuit device having high matching degree and high integration density Jun. 1, 1993
5216281 Self sealed aligned contact incorporating a dopant source Jun. 1, 1993
5181087 Semiconductor device and method of producing the same Jan. 19, 1993
5179041 Method for manufacturing an electrode structure for III-V compound semiconductor element Jan. 12, 1993
5175118 Multiple layer electrode structure for semiconductor device and method of manufacturing thereof Dec. 29, 1992
5174858 Method of forming contact structure Dec. 29, 1992
5173752 Semiconductor device having interconnection layer contacting source/drain regions Dec. 22, 1992
5173442 Methods of forming channels and vias in insulating layers Dec. 22, 1992
5169800 Method of fabricating semiconductor devices by laser planarization of metal layer Dec. 8, 1992
5165066 Contact chain structure for troubleshooting EPROM memory circuits Nov. 17, 1992
5149674 Method for making a planar multi-layer metal bonding pad Sep. 22, 1992
5148266 Semiconductor chip assemblies having interposer and flexible lead Sep. 15, 1992
5148265 Semiconductor chip assemblies with fan-in leads Sep. 15, 1992
5138115 Carrierles surface mounted integrated circuit die Aug. 11, 1992
5136362 Electrical contact with diffusion barrier Aug. 4, 1992
5126286 Method of manufacturing edge connected semiconductor die Jun. 30, 1992
5126819 Wiring pattern of semiconductor integrated circuit device Jun. 30, 1992
5115296 Preferential oxidization self-aligned contact technology May. 19, 1992
5108951 Method for forming a metal contact Apr. 28, 1992
5091339 Trenching techniques for forming vias and channels in multilayer electrical interconnects Feb. 25, 1992
5087588 Method of making a side wall contact with reactive ion etching Feb. 11, 1992
5084416 Method of forming a low resistance contact by forming a contact hole within a recess Jan. 28, 1992
5081060 Method for forming a connection device in a semiconductor device Jan. 14, 1992
5079835 Method of forming a carrierless surface mounted integrated circuit die Jan. 14, 1992
5081516 Self-aligned, planarized contacts for semiconductor devices Jan. 14, 1992
5079617 Multiple layer electrode structure for semiconductor device and method of manufacturing thereof Jan. 7, 1992
5077599 Electrode structure for III-V compound semiconductor element and method of manufacturing the same Dec. 31, 1991
5070391 Semiconductor contact via structure and method Dec. 3, 1991
5070036 Process for contacting and interconnecting semiconductor devices within an integrated circuit Dec. 3, 1991
5066612 Method of forming wiring of a semiconductor device Nov. 19, 1991
5061985 Semiconductor integrated circuit device and process for producing the same Oct. 29, 1991
5061986 Self-aligned extended base contact for a bipolar transistor having reduced cell size and improved electrical characteristics Oct. 29, 1991
5057896 Semiconductor device and method of producing same Oct. 15, 1991
5045916 Extended silicide and external contact technology Sep. 3, 1991

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

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