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Class Information
Number: 257/E23.011
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Packaging, interconnects, and markings for semiconductor or other solid-state devices (epo) > Arrangements for conducting electric current to or from solid-state body in operation, e.g., leads, terminal arrangements (epo) > Internal lead connections, e.g., via connections, feedthrough structures (epo)
Description: This subclass is indented under subclass E23.01. This subclass is substantially the same in scope as ECLA classification H01L23/48J.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7615406 |
Electronic device package manufacturing method and electronic device package |
Nov. 10, 2009 |
| 7615480 |
Methods of post-contact back end of the line through-hole via integration |
Nov. 10, 2009 |
| 7615819 |
Semiconductor device |
Nov. 10, 2009 |
| 7598523 |
Test structures for stacking dies having through-silicon vias |
Oct. 6, 2009 |
| 7598617 |
Stack package utilizing through vias and re-distribution lines |
Oct. 6, 2009 |
| 7595220 |
Image sensor package and fabrication method thereof |
Sep. 29, 2009 |
| 7592700 |
Semiconductor chip and method of manufacturing semiconductor chip |
Sep. 22, 2009 |
| 7592704 |
Etched interposer for integrated circuit devices |
Sep. 22, 2009 |
| 7589410 |
Molded reconfigured wafer, stack package using the same, and method for manufacturing the stack package |
Sep. 15, 2009 |
| 7589411 |
Device for electrical connection of an integrated circuit chip |
Sep. 15, 2009 |
| 7586185 |
Semiconductor device having a functional surface |
Sep. 8, 2009 |
| 7586188 |
Chip package and coreless package substrate thereof |
Sep. 8, 2009 |
| 7576413 |
Packaged stacked semiconductor device and method for manufacturing the same |
Aug. 18, 2009 |
| 7576426 |
Wafer level package including a device wafer integrated with a passive component |
Aug. 18, 2009 |
| 7573135 |
Electronic parts packaging structure in which a semiconductor chip is mounted on a wiring substrate and buried in an insulation film |
Aug. 11, 2009 |
| 7569425 |
Method for manufacturing thermal interface material with carbon nanotubes |
Aug. 4, 2009 |
| 7566974 |
Doped polysilicon via connecting polysilicon layers |
Jul. 28, 2009 |
| 7566656 |
Method and apparatus for providing void structures |
Jul. 28, 2009 |
| 7564115 |
Tapered through-silicon via structure |
Jul. 21, 2009 |
| 7560813 |
Chip-based thermo-stack |
Jul. 14, 2009 |
| 7553699 |
Method of fabricating microelectronic devices |
Jun. 30, 2009 |
| 7554193 |
Semiconductor device |
Jun. 30, 2009 |
| 7550857 |
Stacked redistribution layer (RDL) die assembly package |
Jun. 23, 2009 |
| 7550835 |
Chip stack package utilizing a dummy pattern die between stacked chips for reducing package size |
Jun. 23, 2009 |
| 7550321 |
Substrate having a functionally gradient coefficient of thermal expansion |
Jun. 23, 2009 |
| 7547954 |
Electronic systems using optical waveguide interconnects formed through a semiconductor wafer |
Jun. 16, 2009 |
| 7538415 |
Semiconductor chip assembly with bumped terminal, filler and insulative base |
May. 26, 2009 |
| 7535093 |
Method and apparatus for packaging circuit devices |
May. 19, 2009 |
| 7535094 |
Substrate structure, a method and an arrangement for producing such substrate structure |
May. 19, 2009 |
| 7531906 |
Flip chip packaging using recessed interposer terminals |
May. 12, 2009 |
| 7528071 |
Method for fabricating semiconductor device |
May. 5, 2009 |
| 7528491 |
Semiconductor components and assemblies including vias of varying lateral dimensions |
May. 5, 2009 |
| 7525189 |
Semiconductor device, wiring board, and manufacturing method thereof |
Apr. 28, 2009 |
| 7525192 |
Printed circuit board with quartz crystal oscillator |
Apr. 28, 2009 |
| 7521802 |
Semiconductor device having a refractory metal containing film and method for manufacturing the same |
Apr. 21, 2009 |
| 7521360 |
Electroplating and electroless plating of conductive materials into openings, and structures obtained thereby |
Apr. 21, 2009 |
| 7514794 |
Semiconductor integrated circuit and the method of designing the layout |
Apr. 7, 2009 |
| 7511369 |
BGA-scale stacks comprised of layers containing integrated circuit die and a method for making the same |
Mar. 31, 2009 |
| 7508238 |
Semiconductor integrated circuit device |
Mar. 24, 2009 |
| 7498670 |
Semiconductor structures having electrophoretically insulated vias |
Mar. 3, 2009 |
| 7498676 |
Semiconductor device |
Mar. 3, 2009 |
| 7495316 |
Methods of forming conductive vias and methods of forming multichip modules including such conductive vias |
Feb. 24, 2009 |
| 7492047 |
Semiconductor device and its manufacture method |
Feb. 17, 2009 |
| 7482699 |
Semiconductor device |
Jan. 27, 2009 |
| 7470981 |
Semiconductor device with varying dummy via-hole plug density |
Dec. 30, 2008 |
| 7459777 |
Semiconductor package containing multi-layered semiconductor chips |
Dec. 2, 2008 |
| 7459786 |
Semiconductor device |
Dec. 2, 2008 |
| 7459792 |
Via layout with via groups placed in interlocked arrangement |
Dec. 2, 2008 |
| 7453140 |
Semiconductor chip assembly with laterally aligned filler and insulative base |
Nov. 18, 2008 |
| 7442619 |
Method of forming substantially L-shaped silicide contact for a semiconductor device |
Oct. 28, 2008 |
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