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Class Information
Number: 257/E23.001
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Packaging, interconnects, and markings for semiconductor or other solid-state devices (epo)
Description: This main group provides for preformed physical means to cover or protect semiconductor or other solid state devices, electrical interconnection of such devices and lead elements for facilitating electrical interconnection of the chips or dies via intermediate (e.g., jumper) connections to other devices or components, and marks applied to chips or dies such as test patterns or alignment marks. This subclass is substantially the same in scope as ECLA classification H01L23/00.
Sub-classes under this class:
| Class Number |
Class Name |
Patents |
| 257/E23.01 |
Arrangements for conducting electric current to or from solid-state body in operation, e.g., leads, terminal arrangements (epo) |
126 |
| 257/E23.141 |
Arrangements for conducting electric current within device in operation from one component to another, interconnections, e.g., wires, lead frames (epo) |
126 |
| 257/E23.08 |
Arrangements for cooling, heating, ventilating or temperature compensation; temperature-sensing arrangements (epo) |
225 |
| 257/E23.18 |
Containers; seals (epo) |
14 |
| 257/E23.002 |
Details not otherwise provided for, e.g., protection against moisture (epo) |
238 |
| 257/E23.116 |
Encapsulations, e.g., encapsulating layers, coatings, e.g., for protection (epo) |
43 |
| 257/E23.135 |
Fillings or auxiliary members in containers or encapsulations, e.g., centering rings (epo) |
233 |
| 257/E23.179 |
Marks applied to semiconductor devices or parts, e.g., registration marks, test patterns, alignment structures, wafer maps (epo) |
1,150 |
| 257/E23.003 |
Mountings, e.g., nondetachable insulating substrates (epo) |
27 |
| 257/E23.194 |
Protection against mechanical damage (epo) |
196 |
| 257/E23.114 |
Protection against radiation, e.g., light, electromagnetic waves (epo) |
616 |
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7429797 |
Electronic device and carrier substrate |
Sep. 30, 2008 |
| 7425462 |
Methods relating to the reconstruction of semiconductor wafers for wafer-level processing |
Sep. 16, 2008 |
| 7420267 |
Image sensor assembly and method for fabricating the same |
Sep. 2, 2008 |
| 7416910 |
Pyramid socket suspension |
Aug. 26, 2008 |
| 7417309 |
Circuit device and portable device with symmetrical arrangement |
Aug. 26, 2008 |
| 7417324 |
Semiconductor device and method for manufacturing the same |
Aug. 26, 2008 |
| 7411304 |
Semiconductor interconnect having conductive spring contacts |
Aug. 12, 2008 |
| 7408251 |
Semiconductor packaging device comprising a semiconductor chip including a MOSFET |
Aug. 5, 2008 |
| 7405474 |
Low cost thermally enhanced semiconductor package |
Jul. 29, 2008 |
| 7400046 |
Semiconductor device with guard rings that are formed in each of the plural wiring layers |
Jul. 15, 2008 |
| 7387913 |
3D optoelectronic micro system |
Jun. 17, 2008 |
| 7378721 |
Chip on lead frame for small package speed sensor |
May. 27, 2008 |
| 7378727 |
Memory device and a method of forming a memory device |
May. 27, 2008 |
| 7378748 |
Solid-state imaging device and method for manufacturing the same |
May. 27, 2008 |
| 7372142 |
Vertical conduction power electronic device package and corresponding assembling method |
May. 13, 2008 |
| 7372135 |
Multi-chip image sensor module |
May. 13, 2008 |
| 7368749 |
Method of detecting misalignment of ion implantation area |
May. 6, 2008 |
| 7368809 |
Pillar grid array package |
May. 6, 2008 |
| 7365429 |
Semiconductor device and method for manufacturing the same |
Apr. 29, 2008 |
| 7348210 |
Post bump passivation for soft error protection |
Mar. 25, 2008 |
| 7344919 |
Method for using gel package structure enhancing thermal dissipation between compressed printed circuit board and heat sink mechanical stiffener |
Mar. 18, 2008 |
| 7335971 |
Method for protecting encapsulated sensor structures using stack packaging |
Feb. 26, 2008 |
| 7321166 |
Wiring board having connecting wiring between electrode plane and connecting pad |
Jan. 22, 2008 |
| 7297571 |
Electrostatically actuated low response time power commutation micro-switches |
Nov. 20, 2007 |
| 7291553 |
Method for forming dual damascene with improved etch profiles |
Nov. 6, 2007 |
| 7285842 |
Siloxane epoxy polymers as metal diffusion barriers to reduce electromigration |
Oct. 23, 2007 |
| 7282434 |
Method of manufacturing a semiconductor device |
Oct. 16, 2007 |
| 7276387 |
Castellation wafer level packaging of integrated circuit chips |
Oct. 2, 2007 |
| 7274093 |
Semiconductor device connector, semiconductor device carrier, semiconductor device socket using the same and probe card |
Sep. 25, 2007 |
| 7262491 |
Die pad for semiconductor packages and methods of making and using same |
Aug. 28, 2007 |
| 7262493 |
System and method for mounting electrical devices |
Aug. 28, 2007 |
| 7256501 |
Semiconductor device and manufacturing method of the same |
Aug. 14, 2007 |
| 7253509 |
Semiconductor device, electronic card and pad rearrangement substrate |
Aug. 7, 2007 |
| 7253516 |
Electronic device and carrier substrate for same |
Aug. 7, 2007 |
| 7247943 |
Integrated circuit with at least one bump |
Jul. 24, 2007 |
| 7245011 |
Prevention of contamination on bonding pads of wafer during SMT |
Jul. 17, 2007 |
| 7242082 |
Stackable layer containing ball grid array package |
Jul. 10, 2007 |
| 7229898 |
Methods for fabricating a germanium on insulator wafer |
Jun. 12, 2007 |
| 7223630 |
Low stress semiconductor device coating and method of forming thereof |
May. 29, 2007 |
| 7214563 |
IC chip mounting method |
May. 8, 2007 |
| 7214567 |
Method of producing semiconductor package, apparatus for producing semiconductor package, and adhesive film |
May. 8, 2007 |
| 7208830 |
Interconnect shunt used for current distribution and reliability redundancy |
Apr. 24, 2007 |
| 7186639 |
Metal interconnection lines of semiconductor devices and methods of forming the same |
Mar. 6, 2007 |
| 7169627 |
Method for inspecting a connecting surface of a flip chip |
Jan. 30, 2007 |
| 7144756 |
Structure and material for assembling a low-K Si die to achieve a low warpage and industrial grade reliability flip chip package with organic substrate |
Dec. 5, 2006 |
| 7145222 |
Leadless semiconductor package |
Dec. 5, 2006 |
| 7132737 |
Package for electronic component and method of manufacturing piezoelectric device |
Nov. 7, 2006 |
| 7129571 |
Semiconductor chip package having decoupling capacitor and manufacturing method thereof |
Oct. 31, 2006 |
| 7126174 |
Semiconductor device and method of manufacturing the same |
Oct. 24, 2006 |
| 7102234 |
Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy |
Sep. 5, 2006 |
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