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Class Information
Number: 257/E21.693
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components or integrated circuits formed in, or on, common substrate (epo) > With subsequent division of substrate into plural individual devices (epo) > To produce devices each consisting of plurality of components, e.g., integrated circuits (epo) > Substrate being semiconductor, using silicon technology (epo) > Field-effect technology (epo) > Mis technology (epo) > Dynamic random access memory structures (dram) (epo) > Read-only memory structures (rom), i.e., nonvolatile memory structures (epo) > Electrically programmable (eprom), i.e., floating gate memory structures (epo) > With conductive layer as control gate (epo) > With source and drain on different levels, e.g., sloping channel (epo) > For vertical channel (epo)
Description: This subclass is indented under subclass E21.692. This subclass is substantially the same in scope as ECLA classification H01L21/8247M8V.

Patents under this class:
1 2 3

Patent Number Title Of Patent Date Issued
8629018 Methods of forming NAND memory constructions Jan. 14, 2014
8519475 Semiconductor device Aug. 27, 2013
8513087 Processes for forming isolation structures for integrated circuit devices Aug. 20, 2013
8450176 Methods of manufacturing rewriteable three-dimensional semiconductor memory devices May. 28, 2013
8409952 Method of forming an electronic device including forming a charge storage element in a trench of a workpiece Apr. 2, 2013
8320182 Nonvolatile semiconductor memory device Nov. 27, 2012
7943466 Method of forming a semiconductor device having sub-surface trench charge compensation regions May. 17, 2011
7875922 Nonvolatile semiconductor memory and process of producing the same Jan. 25, 2011
7851293 Method for forming vertical channel transistor of semiconductor device Dec. 14, 2010
7838913 Hybrid FET incorporating a finFET and a planar FET Nov. 23, 2010
7829415 Method of fabricating semiconductor device for preventing a pillar pattern from bending and from exposing externally Nov. 9, 2010
7781290 Complementary metal-oxide semiconductor (CMOS) devices including a thin-body channel and dual gate dielectric layers and methods of manufacturing the same Aug. 24, 2010
7767501 Devices using abrupt metal-insulator transition layer and method of fabricating the device Aug. 3, 2010
7749855 Capacitor structure used for flash memory Jul. 6, 2010
7709889 Semiconductor device with improved breakdown properties and manufacturing method thereof May. 4, 2010
7700429 Method for forming fin transistor Apr. 20, 2010
7682902 Memory structure and method of making the same Mar. 23, 2010
7682889 Trench field effect transistor and method of making it Mar. 23, 2010
7651916 Electronic device including trenches and discontinuous storage elements and processes of forming and using the same Jan. 26, 2010
7608893 Multi-channel transistor structure and method of making thereof Oct. 27, 2009
7547603 Non-planar non-volatile memory cell with an erase gate, an array therefor, and a method of making same Jun. 16, 2009
7301804 NROM memory cell, memory array, related devices and methods Nov. 27, 2007
7268379 Memory cell and method for manufacturing the same Sep. 11, 2007
7190019 Integrated circuits with openings that allow electrical contact to conductive features having self-aligned edges Mar. 13, 2007
7119384 Field effect transistor and method for fabricating it Oct. 10, 2006
7112832 Transistor having multiple channels Sep. 26, 2006
7087950 Flash memory cell, flash memory device and manufacturing method thereof Aug. 8, 2006
7074673 Service programmable logic arrays with low tunnel barrier interpoly insulators Jul. 11, 2006
7068544 Flash memory with low tunnel barrier interpoly insulators Jun. 27, 2006
7056792 Stacked gate flash memory device and method of fabricating the same Jun. 6, 2006
7042043 Programmable array logic or memory devices with asymmetrical tunnel barriers May. 9, 2006
7027328 Integrated circuit memory device and method Apr. 11, 2006
7022573 Stack gate with tip vertical memory and method for fabricating the same Apr. 4, 2006
7019353 Three dimensional flash cell Mar. 28, 2006
7009888 Low voltage, island-layer-based nonvolatile semiconductor storage device with floating biased memory cell channel Mar. 7, 2006
6998313 Stacked gate flash memory device and method of fabricating the same Feb. 14, 2006
6998314 Fabricating a 2F.sup.2 memory device with a horizontal floating gate Feb. 14, 2006
6996009 NOR flash memory cell with high storage density Feb. 7, 2006
6979857 Apparatus and method for split gate NROM memory Dec. 27, 2005
6952032 Programmable array logic or memory devices with asymmetrical tunnel barriers Oct. 4, 2005
6933556 Semiconductor memory with gate at least partially located in recess defined in vertically oriented semiconductor layer Aug. 23, 2005
6921696 Vertical floating gate transistor Jul. 26, 2005
6913974 Flash memory device structure and manufacturing method thereof Jul. 5, 2005
6906379 Semiconductor memory array of floating gate memory cells with buried floating gate Jun. 14, 2005
6897520 Vertically integrated flash EEPROM for greater density and lower cost May. 24, 2005
6888193 Split gate flash memory and formation method thereof May. 3, 2005
6887749 Multiple oxide thicknesses for merged memory and logic applications May. 3, 2005
6878991 Vertical device 4F2 EEPROM memory Apr. 12, 2005
6873006 Semiconductor memory array of floating gate memory cells with burried floating gate and pointed channel region Mar. 29, 2005
6873003 Nonvolatile memory cell Mar. 29, 2005

1 2 3

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