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Class Information
Number: 257/E21.685
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components or integrated circuits formed in, or on, common substrate (epo) > With subsequent division of substrate into plural individual devices (epo) > To produce devices each consisting of plurality of components, e.g., integrated circuits (epo) > Substrate being semiconductor, using silicon technology (epo) > Field-effect technology (epo) > Mis technology (epo) > Dynamic random access memory structures (dram) (epo) > Read-only memory structures (rom), i.e., nonvolatile memory structures (epo) > Electrically programmable (eprom), i.e., floating gate memory structures (epo) > With conductive layer as control gate (epo) > With source and drain on same level and without cell select transistor (epo) > Simultaneous fabrication of periphery and memory cells (epo) > Including one type of peripheral fet (epo) > Control gate layer used for peripheral fet (epo)
Description: This subclass is indented under subclass E21.684. This subclass is substantially the same in scope as ECLA classification H01L21/8247M2P1C.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7425482 |
Non-volatile memory device and method for fabricating the same |
Sep. 16, 2008 |
| 7122430 |
Nonvolatile semiconductor memory and manufacturing method for the same |
Oct. 17, 2006 |
| 6998304 |
Method for integrated manufacturing of split gate flash memory with high voltage MOSFETS |
Feb. 14, 2006 |
| 6977409 |
Flash memory having memory section and peripheral circuit section |
Dec. 20, 2005 |
| 6977200 |
Method of manufacturing split-gate memory |
Dec. 20, 2005 |
| 6953973 |
Self-aligned trench isolation method and semiconductor device fabricated using the same |
Oct. 11, 2005 |
| 6943071 |
Integrated memory cell and method of fabrication |
Sep. 13, 2005 |
| 6930351 |
Semiconductor device with dummy gate electrode |
Aug. 16, 2005 |
| 6911701 |
Metal oxide semiconductor transistor |
Jun. 28, 2005 |
| 6906378 |
Non-volatile semiconductor memory device and method of fabricating the same |
Jun. 14, 2005 |
| 6849490 |
Semiconductor device having a memory cell region and a peripheral circuit region and method of manufacturing thereof |
Feb. 1, 2005 |
| 6841487 |
Method of manufacturing semiconductor device and flash memory |
Jan. 11, 2005 |
| 6841444 |
Nonvolatile semiconductor memory device and manufacturing method thereof |
Jan. 11, 2005 |
| 6818504 |
Processes and structures for self-aligned contact non-volatile memory with peripheral transistors easily modifiable for various technologies and applications |
Nov. 16, 2004 |
| 6812098 |
Method for manufacturing non-volatile memory device |
Nov. 2, 2004 |
| 6808992 |
Method and system for tailoring core and periphery cells in a nonvolatile memory |
Oct. 26, 2004 |
| 6759298 |
Methods of forming an array of flash field effect transistors and circuitry peripheral to such array |
Jul. 6, 2004 |
| 6740918 |
Semiconductor memory device |
May. 25, 2004 |
| 6667507 |
Flash memory having memory section and peripheral circuit section |
Dec. 23, 2003 |
| 6620690 |
Method of fabricating flash memory device using self-aligned non-exposure pattern formation process |
Sep. 16, 2003 |
| 6603171 |
Electronic devices with nonvolatile memory cells of reduced dimensions |
Aug. 5, 2003 |
| 6596608 |
Method of manufacturing non-volatile semiconductor memory device |
Jul. 22, 2003 |
| 6590254 |
Nonvolatile semiconductor memory device and method of manufacturing the same |
Jul. 8, 2003 |
| 6579763 |
Methods of forming an array of FLASH field effect transistors and circuitry peripheral to the array |
Jun. 17, 2003 |
| 6580117 |
Non-volatile semiconductor memory device and method of manufacturing the same |
Jun. 17, 2003 |
| 6534355 |
Method of manufacturing a flash memory having a select transistor |
Mar. 18, 2003 |
| 6518618 |
Integrated memory cell and method of fabrication |
Feb. 11, 2003 |
| 6509222 |
Process for manufacturing electronic devices comprising nonvolatile memory cells of reduced dimensions |
Jan. 21, 2003 |
| 6509232 |
Formation of STI (shallow trench isolation) structures within core and periphery areas of flash memory device |
Jan. 21, 2003 |
| 6483749 |
Nonvolatile memory device having bulk bias contact structure in cell array region |
Nov. 19, 2002 |
| 6476438 |
Nonvolatile semiconductor memory device and method of manufacturing the same |
Nov. 5, 2002 |
| 6458655 |
Method of manufacturing semiconductor device and flash memory |
Oct. 1, 2002 |
| 6455373 |
Semiconductor device having gate edges protected from charge gain/loss |
Sep. 24, 2002 |
| 6436778 |
Re-oxidation approach to improve peripheral gate oxide integrity in a tunnel nitride oxidation process |
Aug. 20, 2002 |
| 6392269 |
Non-volatile semiconductor memory and manufacturing method thereof |
May. 21, 2002 |
| 6365457 |
Method for manufacturing nonvolatile memory device using self-aligned source process |
Apr. 2, 2002 |
| 6344386 |
Method for fabricating semiconductor device including memory cell region and CMOS logic region |
Feb. 5, 2002 |
| 6331724 |
Single transistor E2prom memory device with controlled erasing |
Dec. 18, 2001 |
| 6287907 |
Method of manufacturing a flash memory having a select transistor |
Sep. 11, 2001 |
| 6265292 |
Method of fabrication of a novel flash integrated circuit |
Jul. 24, 2001 |
| 6248627 |
Method for protecting gate edges from charge gain/loss in semiconductor device |
Jun. 19, 2001 |
| 6235585 |
Method for fabricating flash memory device and peripheral area |
May. 22, 2001 |
| 6228723 |
Method for forming split gate non-volatile memory cells without forming a conductive layer on a boundary region between a memory cell array and peripheral logic |
May. 8, 2001 |
| 6214669 |
Single-chip contact-less read-only memory (ROM) device and the method for fabricating the device |
Apr. 10, 2001 |
| 6207991 |
Integrated non-volatile and CMOS memories having substantially the same thickness gates and methods of forming the same |
Mar. 27, 2001 |
| 6194320 |
Method for preparing a semiconductor device |
Feb. 27, 2001 |
| 6180457 |
Method of manufacturing non-volatile memory device |
Jan. 30, 2001 |
| 6177312 |
Method for removing contaminate nitrogen from the peripheral gate region of a non-volatile memory device during production of such device |
Jan. 23, 2001 |
| 6160317 |
Method of spacer formation and source protection after self-aligned source formed and a device provided by such a method |
Dec. 12, 2000 |
| 6159802 |
Method of forming a stack-gate of a non-volatile memory on a semiconductor wafer |
Dec. 12, 2000 |
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