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Class Information
Number: 257/E21.675
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components or integrated circuits formed in, or on, common substrate (epo) > With subsequent division of substrate into plural individual devices (epo) > To produce devices each consisting of plurality of components, e.g., integrated circuits (epo) > Substrate being semiconductor, using silicon technology (epo) > Field-effect technology (epo) > Mis technology (epo) > Dynamic random access memory structures (dram) (epo) > Read-only memory structures (rom), i.e., nonvolatile memory structures (epo) > Rom only (epo) > With source and drain on same level, e.g., lateral channel (epo) > Gate dielectric programmed, e.g., different thickness (epo)
Description: This subclass is indented under subclass E21.668. This subclass is substantially the same in scope as ECLA classification H01L21/8246R2T.










Patents under this class:

Patent Number Title Of Patent Date Issued
8450165 Semiconductor device having tipless epitaxial source/drain regions May. 28, 2013
8420460 Method, structure and design structure for customizing history effects of SOI circuits Apr. 16, 2013
8003548 Atomic layer deposition Aug. 23, 2011
7842996 Memory cell of nonvolatile semiconductor memory Nov. 30, 2010
7829400 Semiconductor device fabrication method and semiconductor device Nov. 9, 2010
7759238 Method for fabricating semiconductor device capable of adjusting the thickness of gate oxide layer Jul. 20, 2010
7745326 Semiconductor device having multiple wiring layers and method of producing the same Jun. 29, 2010
7700417 Methods for forming cascode current mirrors Apr. 20, 2010
7655993 Method for manufacturing semiconductor integrated circuit device Feb. 2, 2010
7528042 Method for fabricating semiconductor devices having dual gate oxide layer May. 5, 2009
7439194 Lanthanide doped TiOx dielectric films by plasma oxidation Oct. 21, 2008
7335607 Method of forming a gate dielectric layer Feb. 26, 2008
7172942 Method for manufacturing semiconductor elemental device Feb. 6, 2007
7157339 Method for fabricating semiconductor devices having dual gate oxide layers Jan. 2, 2007
7008847 Semiconductor device having electrically erasable programmable read-only memory (EEPROM) and mask-ROM and method of fabricating the same Mar. 7, 2006
6812531 Matrix of memory cells fabricated by means of a self-aligned source process, comprising ROM memory cells, and related manufacturing process Nov. 2, 2004
6798693 Semiconductor memory cell and memory array using a breakdown phenomena in an ultra-thin dielectric Sep. 28, 2004
6720210 Mask ROM structure and manufacturing method thereof Apr. 13, 2004
6667902 Semiconductor memory cell and memory array using a breakdown phenomena in an ultra-thin dielectric Dec. 23, 2003
6642587 High density ROM architecture Nov. 4, 2003
6221698 Process for making high density mask ROM Apr. 24, 2001
6200861 Method of fabricating high density multiple states mask ROM cells Mar. 13, 2001
6091119 Double poly-gate high density multi-state flat mask ROM cells Jul. 18, 2000
6015756 Trench-shaped read-only memory and its method of fabrication Jan. 18, 2000
5969989 Semiconductor memory device capable of storing plural-bit data in a single memory cell Oct. 19, 1999
5885873 Double coding processes for mask read only memory (ROM) devices Mar. 23, 1999
5882971 Method of making multi-stage ROM structure Mar. 16, 1999
5877055 Method for fabricating multi-stage ROM structure Mar. 2, 1999
5864164 Multi-stage ROM structure and method for fabricating the same Jan. 26, 1999
5843823 Method for fabricating a multi-stage ROM structure Dec. 1, 1998
5831314 Trench-shaped read-only memory and its method of fabrication Nov. 3, 1998
5824585 Semiconductor read-only memory device and method of fabricating the same Oct. 20, 1998
5793690 Semiconductor memory device capable of storing plural-bit data in a single memory cell Aug. 11, 1998
5712203 Process for fabricating read-only memory cells using removable barrier strips Jan. 27, 1998
5597753 CVD oxide coding method for ultra-high density mask read-only-memory (ROM) Jan. 28, 1997
5573966 Method for making a read-only memory device having trenches Nov. 12, 1996
5571739 Method for fabricating a read-only-memory (ROM) using a new ROM code mask process Nov. 5, 1996
5504030 Process for fabricating high-density mask ROM devices Apr. 2, 1996
5480823 Method of making high density ROM, without using a code implant Jan. 2, 1996
4271421 High density N-channel silicon gate read only memory Jun. 2, 1981
4151020 High density N-channel silicon gate read only memory Apr. 24, 1979
3985591 Method of manufacturing parallel gate matrix circuits Oct. 12, 1976











 
 
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