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Class Information
Number: 257/E21.673
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components or integrated circuits formed in, or on, common substrate (epo) > With subsequent division of substrate into plural individual devices (epo) > To produce devices each consisting of plurality of components, e.g., integrated circuits (epo) > Substrate being semiconductor, using silicon technology (epo) > Field-effect technology (epo) > Mis technology (epo) > Dynamic random access memory structures (dram) (epo) > Read-only memory structures (rom), i.e., nonvolatile memory structures (epo) > Rom only (epo) > With source and drain on same level, e.g., lateral channel (epo) > Doping programmed, e.g., mask rom (epo) > Source or drain doping programmed (epo)
Description: This subclass is indented under subclass E21.671. This subclass is substantially the same in scope as ECLA classification H01L21/8246R2D6.

Patents under this class:
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Patent Number Title Of Patent Date Issued
8455342 Mask ROM fabrication method Jun. 4, 2013
7777256 Mask ROM device, semiconductor device including the mask ROM device, and methods of fabricating mask ROM device and semiconductor device Aug. 17, 2010
7704825 Method of fabricating memory including diode Apr. 27, 2010
7075137 Semiconductor memory having charge trapping memory cells Jul. 11, 2006
7012310 Array of multi-bit ROM cells with each cell having bi-directional read and a method for making the array Mar. 14, 2006
6955966 Method of manufacturing non-volatile read only memory Oct. 18, 2005
6919607 Structure of two-bit mask read-only memory device and fabricating method thereof Jul. 19, 2005
6916701 Method for fabricating a silicide layer of flat cell memory Jul. 12, 2005
6870233 Multi-bit ROM cell with bi-directional read and a method for making thereof Mar. 22, 2005
6841827 Semiconductor memory device Jan. 11, 2005
6841460 Anti-type dosage as LDD implant Jan. 11, 2005
6803283 Method to code flashROM using LDD and source/drain implant Oct. 12, 2004
6780710 Method of manufacturing non-volatile read only memory Aug. 24, 2004
6734085 Anti-type dosage as LDD implant May. 11, 2004
6713315 Mask read-only memory and fabrication thereof Mar. 30, 2004
6699761 Method for fabricating y-direction, self-alignment mask ROM device Mar. 2, 2004
6677206 Non-volatile high-performance memory device and relative manufacturing process Jan. 13, 2004
6675580 PV/thermal solar power assembly Jan. 13, 2004
6590266 2-bit mask ROM device and fabrication method thereof Jul. 8, 2003
6573574 Cell array region of a NOR-type mask ROM device and fabricating method therefor Jun. 3, 2003
6512276 Semiconductor memory having an improved cell layout Jan. 28, 2003
6487119 Non-volatile read only memory and its manufacturing method Nov. 26, 2002
6468869 Method of fabricating mask read only memory Oct. 22, 2002
6448112 Cell array region of a NOR-type mask ROM device and fabricating method therefor Sep. 10, 2002
6440803 Method of fabricating a mask ROM with raised bit-line on each buried bit-line Aug. 27, 2002
6436612 Method for forming a protection device with slope laterals Aug. 20, 2002
6432778 Method of forming a system on chip (SOC) with nitride read only memory (NROM) Aug. 13, 2002
6404018 Static memory cell and method of manufacturing a static memory cell Jun. 11, 2002
6201282 Two bit ROM cell and process for producing same Mar. 13, 2001
6140685 Static memory cell and method of manufacturing a static memory cell Oct. 31, 2000
6133101 Low mask count process to fabricate mask read only memory devices Oct. 17, 2000
6118160 Structure of a mask ROM device on a semiconductor substrate having a cell area for coding Sep. 12, 2000
6091119 Double poly-gate high density multi-state flat mask ROM cells Jul. 18, 2000
6087228 Method of making a nonvolatile memory cell using EPROM mask and ROM processing steps Jul. 11, 2000
6043127 Method for manufacturing multiple stage ROM unit Mar. 28, 2000
6037225 Manufacturing method for mask ROM devices Mar. 14, 2000
6030871 Process for producing two bit ROM cell utilizing angled implant Feb. 29, 2000
5970348 Read-only memory and corresponding method of manufacturing by MOS technology Oct. 19, 1999
5955769 Multiple stage ROM unit Sep. 21, 1999
5891781 Method for coding mask read-only memory Apr. 6, 1999
5811862 Semiconductor device having a mask programmable memory and manufacturing method thereof Sep. 22, 1998
5796149 Semiconductor memory using different concentration impurity diffused layers Aug. 18, 1998
5793086 NOR-type ROM with LDD cells and process of fabrication Aug. 11, 1998
5786618 ROM memory cell with non-uniform threshold voltage Jul. 28, 1998
5780906 Static memory cell and method of manufacturing a static memory cell Jul. 14, 1998
5770497 Method of manufacturing a novel static memory cell having a tunnel diode Jun. 23, 1998
5753553 Method of fabricating ROMs by selectively forming sidewalls on wordlines May. 19, 1998
5733795 Method of fabricating a MOS read-only semiconductor memory array Mar. 31, 1998
5732012 Rom cell with reduced drain capacitance Mar. 24, 1998
5716885 Method for manufacturing NAND type mask-ROM having improved cell current Feb. 10, 1998

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