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Class Information
Number: 257/E21.672
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components or integrated circuits formed in, or on, common substrate (epo) > With subsequent division of substrate into plural individual devices (epo) > To produce devices each consisting of plurality of components, e.g., integrated circuits (epo) > Substrate being semiconductor, using silicon technology (epo) > Field-effect technology (epo) > Mis technology (epo) > Dynamic random access memory structures (dram) (epo) > Read-only memory structures (rom), i.e., nonvolatile memory structures (epo) > Rom only (epo) > With source and drain on same level, e.g., lateral channel (epo) > Doping programmed, e.g., mask rom (epo) > Entire channel doping programmed (epo)
Description: This subclass is indented under subclass E21.671. This subclass is substantially the same in scope as ECLA classification H01L21/8246R2D4.










Patents under this class:
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Patent Number Title Of Patent Date Issued
7824988 Method of forming an integrated circuit Nov. 2, 2010
7030448 Mask ROM and the method of forming the same and the scheme of reading the device Apr. 18, 2006
7015553 Compact mask programmable ROM Mar. 21, 2006
7008848 Mask ROM fabrication method Mar. 7, 2006
7008847 Semiconductor device having electrically erasable programmable read-only memory (EEPROM) and mask-ROM and method of fabricating the same Mar. 7, 2006
7005693 Semiconductor memory device for storing data in memory cells as complementary information Feb. 28, 2006
6998316 Method for fabricating read only memory including a first and second exposures to a photoresist layer Feb. 14, 2006
6969642 Method of controlling implantation dosages during coding of read-only memory devices Nov. 29, 2005
6967388 Semiconductor devices and methods for fabricating the same Nov. 22, 2005
6940135 Mask-ROM process and device to prevent punch through using a halo implant process Sep. 6, 2005
6894333 Oxide layer of variable thickness between word lines and bit lines of a memory device May. 17, 2005
6875659 Methods of code programming a mask ROM Apr. 5, 2005
6864142 Method to produce a factory programmable IC using standard IC wafers and the structure Mar. 8, 2005
6864548 Semiconductor device with source line having reduced resistance and manufacturing method therefor Mar. 8, 2005
6855993 Semiconductor devices and methods for fabricating the same Feb. 15, 2005
6831335 Memory device having buried source/drain region and fabrication thereof Dec. 14, 2004
6822286 Cmos-compatible read only memory and method for fabricating the same Nov. 23, 2004
6821841 Method for fabricating a mask read-only-memory with diode cells Nov. 23, 2004
6821684 Method for fabricating mask ROM with self-aligned coding Nov. 23, 2004
6806535 Non-volatile memory and fabricating method thereof Oct. 19, 2004
6794280 Method of fabricating non-volatile memory Sep. 21, 2004
6773937 Method of verifying a mask for a mask ROM Aug. 10, 2004
6762100 Mask ROM cell and method of fabricating the same Jul. 13, 2004
6756275 Method for minimizing product turn-around time for making semiconductor permanent store ROM cell Jun. 29, 2004
6734064 Method for fabricating read only memory including forming masking layers with openings and pre-coding the cell and peripheral regions May. 11, 2004
6720210 Mask ROM structure and manufacturing method thereof Apr. 13, 2004
6713354 Coding method for mask ROM Mar. 30, 2004
6713821 Structure of a mask ROM device Mar. 30, 2004
6689663 Methods of code programming a mask ROM Feb. 10, 2004
6687154 Highly-integrated flash memory and mask ROM array architecture Feb. 3, 2004
6673682 Methods of fabricating high density mask ROM cells Jan. 6, 2004
6670247 Method of fabricating mask read only memory Dec. 30, 2003
6660589 Semiconductor devices and methods for fabricating the same Dec. 9, 2003
6645816 Fabricating memory device having buried source/drain region and fabrication thereof Nov. 11, 2003
6620693 Non-volatile memory and fabrication thereof Sep. 16, 2003
6576518 Method of manufacturing a mask ROM semiconductor device Jun. 10, 2003
6573573 Mask ROM and method for fabricating the same Jun. 3, 2003
6569713 Method of fabricating read only memory May. 27, 2003
6562548 Method for fabricating a mask read-only memory May. 13, 2003
6559013 Method for fabricating mask ROM device May. 6, 2003
6555881 Mask ROM cell and method of fabricating the same Apr. 29, 2003
6541828 Non-volatile memory device used for non-overlapping implant Apr. 1, 2003
6525361 Process and integrated circuit for a multilevel memory cell with an asymmetric drain Feb. 25, 2003
6468868 Method of forming high density multi-state mask ROM cells Oct. 22, 2002
6441425 Non-volatile semiconductor device and non-volatile semiconductor memory device for storing multi-value information Aug. 27, 2002
6436772 Method of manufacturing semiconductor device having memory cell transistors Aug. 20, 2002
6420235 Method of forming self-aligned mask ROM Jul. 16, 2002
6403424 Method for forming self-aligned mask read only memory by dual damascene trenches Jun. 11, 2002
6403422 Semiconductor device and method of manufacturing the same Jun. 11, 2002
6388911 Bank select structure layout of read only memory without the junction leakage May. 14, 2002

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