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Class Information
Number: 257/E21.661
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components or integrated circuits formed in, or on, common substrate (epo) > With subsequent division of substrate into plural individual devices (epo) > To produce devices each consisting of plurality of components, e.g., integrated circuits (epo) > Substrate being semiconductor, using silicon technology (epo) > Field-effect technology (epo) > Mis technology (epo) > Dynamic random access memory structures (dram) (epo) > Static random access memory structures (sram) (epo)
Description: This subclass is indented under subclass E21.645. This subclass is substantially the same in scope as ECLA classification H01L21/8244.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7408231 |
SRAM memory semiconductor integrated circuit device |
Aug. 5, 2008 |
| 7384839 |
SRAM cell with asymmetrical transistors for reduced leakage |
Jun. 10, 2008 |
| 7382026 |
Semiconductor memory device and method of manufacturing the same |
Jun. 3, 2008 |
| 7378309 |
Method of fabricating local interconnects on a silicon-germanium 3D CMOS |
May. 27, 2008 |
| 7375401 |
Static random access memory using thin film transistors |
May. 20, 2008 |
| 7368788 |
SRAM cells having inverters and access transistors therein with vertical fin-shaped active regions |
May. 6, 2008 |
| 7358131 |
Methods of forming SRAM constructions |
Apr. 15, 2008 |
| 7358556 |
SRAM cell structure and manufacturing method thereof |
Apr. 15, 2008 |
| 7332780 |
Inverter, semiconductor logic circuit, static random access memory and data latch circuit |
Feb. 19, 2008 |
| 7312490 |
Vertical memory device and method |
Dec. 25, 2007 |
| 7306984 |
Method of manufacture of a semiconductor integrated circuit device including a plurality of columnar laminates having different spacing in different directions |
Dec. 11, 2007 |
| 7304352 |
Alignment insensitive D-cache cell |
Dec. 4, 2007 |
| 7279755 |
SRAM cell with improved layout designs |
Oct. 9, 2007 |
| 7276753 |
Dynamic random access memory cell and fabricating method thereof |
Oct. 2, 2007 |
| 7271451 |
Memory cell structure |
Sep. 18, 2007 |
| 7259431 |
Static random access memory using thin film transistors |
Aug. 21, 2007 |
| 7259052 |
Manufacture of a semiconductor integrated circuit device including a pluarality of a columnar laminates having different spacing in different directions |
Aug. 21, 2007 |
| 7244977 |
Longitudinal MISFET manufacturing method, longitudinal MISFET, semiconductor storage device manufacturing method, and semiconductor storage device |
Jul. 17, 2007 |
| 7214990 |
Memory cell with reduced soft error rate |
May. 8, 2007 |
| 7208369 |
Dual poly layer and method of manufacture |
Apr. 24, 2007 |
| 7199433 |
Method of manufacturing semiconductor integrated circuit device having capacitor element |
Apr. 3, 2007 |
| 7189627 |
Method to improve SRAM performance and stability |
Mar. 13, 2007 |
| 7187036 |
Connection structure for SOI devices |
Mar. 6, 2007 |
| 7105900 |
Reduced floating body effect static random access memory cells and methods for fabricating the same |
Sep. 12, 2006 |
| 7075157 |
Method of manufacturing a semiconductor integrated circuit device |
Jul. 11, 2006 |
| 7071509 |
Method of improving the top plate electrode stress inducting voids for 1T-RAM process |
Jul. 4, 2006 |
| 7067864 |
SRAM having an improved capacitor |
Jun. 27, 2006 |
| 7064395 |
Semiconductor device and method for fabricating the same |
Jun. 20, 2006 |
| 7061128 |
Semiconductor device and manufacturing method of the same |
Jun. 13, 2006 |
| 7057218 |
Edge intensive antifuse |
Jun. 6, 2006 |
| 7049230 |
Method of forming a contact plug in a semiconductor device |
May. 23, 2006 |
| 7049680 |
Semiconductor integrated circuit device and process for manufacturing the same |
May. 23, 2006 |
| 7045864 |
Semiconductor integrated circuit device |
May. 16, 2006 |
| 7041544 |
Semiconductor integrated circuit and method for fabricating the same |
May. 9, 2006 |
| 7038926 |
Multi-port static random access memory |
May. 2, 2006 |
| 7037776 |
Single polysilicon process for DRAM |
May. 2, 2006 |
| 7030449 |
Semiconductor integrated circuit device having capacitor element |
Apr. 18, 2006 |
| 7029963 |
Semiconductor damascene trench and methods thereof |
Apr. 18, 2006 |
| 7027287 |
Storage capacitor with high memory capacity and low surface area |
Apr. 11, 2006 |
| 7026206 |
Method of making resistive element having a stable contact resistance |
Apr. 11, 2006 |
| 7023071 |
Semiconductor integrated circuit device and process for manufacturing the same |
Apr. 4, 2006 |
| 7022568 |
Semiconductor integrated circuit device and process for manufacturing the same |
Apr. 4, 2006 |
| 7022563 |
Semiconductor integrated circuit device and a method of manufacturing the same |
Apr. 4, 2006 |
| 7015554 |
Semiconductor device and method for fabricating the same |
Mar. 21, 2006 |
| 7012293 |
Fabricating an SRAM cell |
Mar. 14, 2006 |
| 7006398 |
Single data line sensing scheme for TCCT-based memory cells |
Feb. 28, 2006 |
| 6999351 |
Computer systems, processes for turning a SRAM cell off, and processes for writing a SRAM cell and processes for reading data from a SRAM cell |
Feb. 14, 2006 |
| 6995418 |
Integrated semiconductor storage with at least a storage cell and procedure |
Feb. 7, 2006 |
| 6995425 |
Semiconductor memory device having memory cell section and peripheral circuit section and method of manufacturing the same |
Feb. 7, 2006 |
| 6984859 |
Semiconductor memory device with static memory cells |
Jan. 10, 2006 |
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