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Class Information
Number: 257/E21.656
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components or integrated circuits formed in, or on, common substrate (epo) > With subsequent division of substrate into plural individual devices (epo) > To produce devices each consisting of plurality of components, e.g., integrated circuits (epo) > Substrate being semiconductor, using silicon technology (epo) > Field-effect technology (epo) > Mis technology (epo) > Dynamic random access memory structures (dram) (epo) > Characterized by type of capacitor (epo) > Characterized by data lines (epo)
Description: This subclass is indented under subclass E21.646. This subclass is substantially the same in scope as ECLA classification H01L21/8242D.










Sub-classes under this class:

Class Number Class Name Patents
257/E21.657 Making bit line (epo) 359
257/E21.658 Making bit line contact (epo) 497
257/E21.659 Making word line (epo) 189


Patents under this class:
1 2 3

Patent Number Title Of Patent Date Issued
8618607 Semiconductor devices formed on a continuous active region with an isolating conductive structure positioned between such semiconductor devices, and methods of making same Dec. 31, 2013
8603876 Dynamic memory cell methods Dec. 10, 2013
8450746 Pixel array substrate and detecting module May. 28, 2013
8338253 Forming a buried word line and connection pad for memory apparatus Dec. 25, 2012
8198127 Charge mapping memory array formed of materials with mutable electrical characteristics Jun. 12, 2012
8114737 Methods of forming memory cells on pillars and memories with memory cells on pillars Feb. 14, 2012
8044438 Liquid crystal display and substrate thereof Oct. 25, 2011
8021974 Structure and method for back end of the line integration Sep. 20, 2011
7932168 Method for fabricating bitline in semiconductor device Apr. 26, 2011
7928504 Semiconductor memory device and method for manufacturing the same Apr. 19, 2011
7915667 Integrated circuits having a contact region and methods for manufacturing the same Mar. 29, 2011
7645644 Data line layout in semiconductor memory device and method of forming the same Jan. 12, 2010
7601630 Semiconductor device and method for fabricating the same Oct. 13, 2009
7595262 Manufacturing method for an integrated semiconductor structure Sep. 29, 2009
7575992 Method of forming micro patterns in semiconductor devices Aug. 18, 2009
7439102 Semiconductor fuse box and method for fabricating the same Oct. 21, 2008
7074669 Semiconductor integrated circuit device with capacitor of crown structure and method of manufacturing the same Jul. 11, 2006
7057224 Semiconductor memory having an arrangement of memory cells Jun. 6, 2006
7002866 Semiconductor memory device Feb. 21, 2006
6977421 Semiconductor constructions Dec. 20, 2005
6974987 Semiconductor device Dec. 13, 2005
6974993 Double-sided capacitor structure for a semiconductor device and a method for forming the structure Dec. 13, 2005
6965140 Semiconductor device including storage capacitor Nov. 15, 2005
6958505 Integrated circuit including active components and at least one passive component associated fabrication method Oct. 25, 2005
6955959 Method of making a memory structure having a multilayered contact and a storage capacitor with a composite dielectric layer of crystalized niobium pentoxide and tantalum pentoxide films Oct. 18, 2005
6949429 Semiconductor memory device and method for manufacturing the same Sep. 27, 2005
6943076 Semiconductor device and method of manufacturing the same Sep. 13, 2005
6934206 Test structure for detecting bridging of DRAM capacitors Aug. 23, 2005
6930324 Device architecture and process for improved vertical memory arrays Aug. 16, 2005
6924193 Capacitor Aug. 2, 2005
6900546 Semiconductor memory device and method for manufacturing the same May. 31, 2005
6898109 Semiconductor memory device in which bit lines connected to dynamic memory cells extend left and right of sense amplifier column May. 24, 2005
6893915 Semiconductor device having barrier layer between ruthenium layer and metal layer and method for manufacturing the same May. 17, 2005
6887720 Ferroelectric memory device and method of forming the same May. 3, 2005
6852628 Method of insulating interconnects, and memory cell array with insulated interconnects Feb. 8, 2005
6849387 Method for integrating copper process and MIM capacitor for embedded DRAM Feb. 1, 2005
6833577 Semiconductor device Dec. 21, 2004
6826069 Interleaved wordline architecture Nov. 30, 2004
6806123 Methods of forming isolation regions associated with semiconductor constructions Oct. 19, 2004
6794247 Method of fabricating a semiconductor memory device having resistor Sep. 21, 2004
6791132 Memory semiconductor device with reduced sense amplifier area Sep. 14, 2004
6790725 Double-sided capacitor structure for a semiconductor device and a method for forming the structure Sep. 14, 2004
6788552 Method and apparatus for reducing substrate bias voltage drop Sep. 7, 2004
6787472 Utilization of disappearing silicon hard mask for fabrication of semiconductor structures Sep. 7, 2004
6784026 Microelectronic die including low RC under-layer interconnects Aug. 31, 2004
6781181 Layout of a folded bitline DRAM with a borderless bitline Aug. 24, 2004
6777735 Semiconductor memory device having a metal plug or a landing pad Aug. 17, 2004
6770973 Semiconductor apparatus including a multi-layer wiring configuration and manufacturing method therefor Aug. 3, 2004
6770930 Semiconductor device having MIM structure capacitor Aug. 3, 2004
6768663 Semiconductor device array having dense memory cell array and hierarchical bit line scheme Jul. 27, 2004

1 2 3










 
 
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