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Class Information
Number: 257/E21.652
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components or integrated circuits formed in, or on, common substrate (epo) > With subsequent division of substrate into plural individual devices (epo) > To produce devices each consisting of plurality of components, e.g., integrated circuits (epo) > Substrate being semiconductor, using silicon technology (epo) > Field-effect technology (epo) > Mis technology (epo) > Dynamic random access memory structures (dram) (epo) > Characterized by type of capacitor (epo) > Capacitor stacked over transfer transis tor (epo) > Capacitor in u- or v-shaped trench in substrate (epo) > In combination with vertical transistor (epo)
Description: This subclass is indented under subclass E21.651. This subclass is substantially the same in scope as ECLA classification H01L21/8242B6B.










Patents under this class:
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Patent Number Title Of Patent Date Issued
5300450 High performance composed pillar DRAM cell Apr. 5, 1994
5291438 Transistor and a capacitor used for forming a vertically stacked dynamic random access memory cell Mar. 1, 1994
5276343 Semiconductor memory device having a bit line constituted by a semiconductor layer Jan. 4, 1994
5272102 Method of making semiconductor memory device and memory cells therefor Dec. 21, 1993
5270239 Method for manufacturing a dynamic random access memory cell Dec. 14, 1993
5256588 Method for forming a transistor and a capacitor for use in a vertically stacked dynamic random access memory cell Oct. 26, 1993
5250450 Insulated-gate vertical field-effect transistor with high current drive and minimum overlap capacitance Oct. 5, 1993
5236858 Method of manufacturing a semiconductor device with vertically stacked structure Aug. 17, 1993
5225697 dRAM cell and method Jul. 6, 1993
5218218 Semiconductor device and manufacturing method thereof Jun. 8, 1993
5208657 DRAM Cell with trench capacitor and vertical channel in substrate May. 4, 1993
5204281 Method of making dynamic random access memory cell having a trench capacitor Apr. 20, 1993
5198383 Method of fabricating a composed pillar transistor DRAM Cell Mar. 30, 1993
5198387 Method and apparatus for in-situ doping of deposited silicon Mar. 30, 1993
5162250 Method for interconnecting a filament channel transistor with a wordline conductor Nov. 10, 1992
5155059 Method of manufacturing dynamic RAM Oct. 13, 1992
5124766 Filament channel transistor interconnected with a conductor Jun. 23, 1992
5122848 Insulated-gate vertical field-effect transistor with high current drive and minimum overlap capacitance Jun. 16, 1992
5106775 Process for manufacturing vertical dynamic random access memories Apr. 21, 1992
5106776 Method of making high performance composed pillar dRAM cell Apr. 21, 1992
5103276 High performance composed pillar dRAM cell Apr. 7, 1992
5100823 Method of making buried stacked transistor-capacitor Mar. 31, 1992
5072269 Dynamic ram and method of manufacturing the same Dec. 10, 1991
5057896 Semiconductor device and method of producing same Oct. 15, 1991
5013680 Process for fabricating a DRAM array having feature widths that transcend the resolution limit of available photolithography May. 7, 1991
5001526 Dram cell formed on an insulating layer having a buried semiconductor pillar structure and a manufacturing method thereof Mar. 19, 1991
5001078 Method of making semiconductor memory device Mar. 19, 1991
4990980 Semiconductor memory device Feb. 5, 1991
4967247 Vertical dynamic random access memory Oct. 30, 1990
4945069 Organic space holder for trench processing Jul. 31, 1990
4939104 Method for forming a buried lateral contact Jul. 3, 1990
4920065 Method of making ultra dense dram cells Apr. 24, 1990
4916524 Dram cell and method Apr. 10, 1990
4914739 Structure for contacting devices in three dimensional circuitry Apr. 3, 1990
4910567 Dram cell and method for fabricating Mar. 20, 1990
4894697 Ultra dense dram cell and its method of fabrication Jan. 16, 1990
4835585 Trench gate structures May. 30, 1989
4833516 High density memory cell structure having a vertical trench transistor self-aligned with a vertical trench capacitor and fabrication methods therefor May. 23, 1989
4830978 Dram cell and method May. 16, 1989
4829017 Method for lubricating a high capacity dram cell May. 9, 1989
4824793 Method of making DRAM cell with trench capacitor Apr. 25, 1989
4816884 High density vertical trench transistor and capacitor memory cell structure and fabrication method therefor Mar. 28, 1989
4797373 Method of making dRAM cell with trench capacitor Jan. 10, 1989
4791463 Structure for contacting devices in three dimensional circuitry Dec. 13, 1988
4751558 High density memory with field shield Jun. 14, 1988
4737829 Dynamic random access memory device having a plurality of one-transistor type memory cells Apr. 12, 1988
4713678 dRAM cell and method Dec. 15, 1987
4672410 Semiconductor memory device with trench surrounding each memory cell Jun. 9, 1987
4252579 Method for making single electrode U-MOSFET random access memory utilizing reactive ion etching and polycrystalline deposition Feb. 24, 1981

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