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Class Information
Number: 257/E21.644
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components or integrated circuits formed in, or on, common substrate (epo) > With subsequent division of substrate into plural individual devices (epo) > To produce devices each consisting of plurality of components, e.g., integrated circuits (epo) > Substrate being semiconductor, using silicon technology (epo) > Field-effect technology (epo) > Mis technology (epo) > With particular manufacturing method of wells or tubs, e.g., twin tubs, high energy well implants, buried implanted layers for lateral isolation (billi) (epo)
Description: This subclass is indented under subclass E21.616. This subclass is substantially the same in scope as ECLA classification H01L21/8238W.
Sub-classes under this class:
| Class Number |
Class Name |
Patents |
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7612415 |
Method of forming semiconductor device |
Nov. 3, 2009 |
| 7608515 |
Diffusion layer for stressed semiconductor devices |
Oct. 27, 2009 |
| 7579651 |
Semiconductor device |
Aug. 25, 2009 |
| 7556990 |
CMOS image sensor having improved signal efficiency and method for manufacturing the same |
Jul. 7, 2009 |
| 7521312 |
Method and system for creating self-aligned twin wells with co-planar surfaces in a semiconductor device |
Apr. 21, 2009 |
| 7465632 |
Method for forming buried doped region |
Dec. 16, 2008 |
| 7439140 |
Formation of standard voltage threshold and low voltage threshold MOSFET devices |
Oct. 21, 2008 |
| 7361540 |
Method of reducing noise disturbing a signal in an electronic device |
Apr. 22, 2008 |
| 7361549 |
Method for fabricating memory cells for a memory device |
Apr. 22, 2008 |
| 7354833 |
Method for improving threshold voltage stability of a MOS device |
Apr. 8, 2008 |
| 7297590 |
Method for fabricating an integrated pin diode and associated circuit arrangement |
Nov. 20, 2007 |
| 7294564 |
Method for forming a layered semiconductor technology structure and corresponding layered semiconductor technology structure |
Nov. 13, 2007 |
| 7282402 |
Method of making a dual strained channel semiconductor device |
Oct. 16, 2007 |
| 7273776 |
Methods of forming a P-well in an integrated circuit device |
Sep. 25, 2007 |
| 7223664 |
Semiconductor device and method for fabricating the same |
May. 29, 2007 |
| 7208367 |
Methods of fabricating ferroelectric memory devices having expanded plate lines |
Apr. 24, 2007 |
| 7074659 |
Method of fabricating a lateral double-diffused MOSFET (LDMOS) transistor |
Jul. 11, 2006 |
| 7064399 |
Advanced CMOS using super steep retrograde wells |
Jun. 20, 2006 |
| 7060581 |
Method for manufacturing a semiconductor device |
Jun. 13, 2006 |
| 7052966 |
Deep N wells in triple well structures and method for fabricating same |
May. 30, 2006 |
| 7049199 |
Method of ion implantation for achieving desired dopant concentration |
May. 23, 2006 |
| 7022560 |
Method to manufacture high voltage MOS transistor by ion implantation |
Apr. 4, 2006 |
| 7008836 |
Method to provide a triple well in an epitaxially based CMOS or BiCMOS process |
Mar. 7, 2006 |
| 7002222 |
Integrated semiconductor memory circuit and method of manufacturing the same |
Feb. 21, 2006 |
| 6995431 |
System and method to reduce noise in a substrate |
Feb. 7, 2006 |
| 6992361 |
Deep well implant structure providing latch-up resistant CMOS semiconductor product |
Jan. 31, 2006 |
| 6979864 |
Semiconductor device and method for fabricating such device |
Dec. 27, 2005 |
| 6979845 |
Semiconductor device in which punchthrough is prevented |
Dec. 27, 2005 |
| 6974742 |
Method for fabricating complementary metal oxide semiconductor image sensor |
Dec. 13, 2005 |
| 6969893 |
Semiconductor device and portable electronic apparatus |
Nov. 29, 2005 |
| 6967380 |
CMOS device having retrograde n-well and p-well |
Nov. 22, 2005 |
| 6946339 |
Method for creating a stepped structure on a substrate |
Sep. 20, 2005 |
| 6939757 |
Method for fabricating merged logic CMOS device |
Sep. 6, 2005 |
| 6936898 |
Diagonal deep well region for routing body-bias voltage for MOSFETS in surface well regions |
Aug. 30, 2005 |
| 6933575 |
Semiconductor device and its manufacturing method |
Aug. 23, 2005 |
| 6927151 |
Method of manufacturing semiconductor device |
Aug. 9, 2005 |
| 6927463 |
Semiconductor device and method for fabricating the same |
Aug. 9, 2005 |
| 6927116 |
Semiconductor device having a double-well structure and method for manufacturing the same |
Aug. 9, 2005 |
| 6917081 |
Semiconductor integrated device |
Jul. 12, 2005 |
| 6911694 |
Semiconductor device and method for fabricating such device |
Jun. 28, 2005 |
| 6905948 |
Method for manufacturing semiconductor device |
Jun. 14, 2005 |
| 6902258 |
LDMOS and CMOS integrated circuit and method of making |
Jun. 7, 2005 |
| 6900091 |
Isolated complementary MOS devices in epi-less substrate |
May. 31, 2005 |
| 6887750 |
Method for manufacturing semiconductor device including implanting a first impurity through an anti-oxidation mask |
May. 3, 2005 |
| 6879006 |
MOS transistor and method for fabricating the same |
Apr. 12, 2005 |
| 6870228 |
System and method to reduce noise in a substrate |
Mar. 22, 2005 |
| 6861341 |
Systems and methods for integration of heterogeneous circuit devices |
Mar. 1, 2005 |
| 6858897 |
Individually adjustable back-bias technique |
Feb. 22, 2005 |
| 6855985 |
Modular bipolar-CMOS-DMOS analog integrated circuit & power transistor technology |
Feb. 15, 2005 |
| 6853038 |
Semiconductor device and method for manufacturing the same |
Feb. 8, 2005 |
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