 |
|
 |
| |
 |
|
Class Information
Number: 257/E21.633
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components or integrated circuits formed in, or on, common substrate (epo) > With subsequent division of substrate into plural individual devices (epo) > To produce devices each consisting of plurality of components, e.g., integrated circuits (epo) > Substrate being semiconductor, using silicon technology (epo) > Field-effect technology (epo) > Mis technology (epo) > Complementary field-effect transistors, e.g., cmos (epo) > With particular manufacturing method of channel, e.g., channel implants, halo or pocket implants, or channel materials (epo)
Description: This subclass is indented under subclass E21.632. This subclass is substantially the same in scope as ECLA classification H01L21/8238C.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7615433 |
Double anneal with improved reliability for dual contact etch stop liner scheme |
Nov. 10, 2009 |
| 7611939 |
Semiconductor device manufactured using a laminated stress layer |
Nov. 3, 2009 |
| 7608515 |
Diffusion layer for stressed semiconductor devices |
Oct. 27, 2009 |
| 7595243 |
Fabrication of semiconductor structure having N-channel channel-junction field-effect transistor |
Sep. 29, 2009 |
| 7592270 |
Modulation of stress in stress film through ion implantation and its application in stress memorization technique |
Sep. 22, 2009 |
| 7592619 |
Epitaxy layer and method of forming the same |
Sep. 22, 2009 |
| 7585790 |
Method for forming semiconductor device |
Sep. 8, 2009 |
| 7569449 |
Processes providing high and low threshold p-type and n-type transistors |
Aug. 4, 2009 |
| 7560312 |
Void formation for semiconductor junction capacitance reduction |
Jul. 14, 2009 |
| 7554159 |
Electrostatic discharge protection device and method of manufacturing the same |
Jun. 30, 2009 |
| 7547605 |
Microelectronic device and a method for its manufacture |
Jun. 16, 2009 |
| 7534674 |
Method of making a semiconductor device with a stressor |
May. 19, 2009 |
| 7534676 |
Method of forming enhanced device via transverse stress |
May. 19, 2009 |
| 7531392 |
Multi-orientation semiconductor-on-insulator (SOI) substrate, and method of fabricating same |
May. 12, 2009 |
| 7525162 |
Orientation-optimized PFETS in CMOS devices employing dual stress liners |
Apr. 28, 2009 |
| 7521735 |
Multiple layer and crystal plane orientation semiconductor substrate |
Apr. 21, 2009 |
| 7521307 |
CMOS structures and methods using self-aligned dual stressed layers |
Apr. 21, 2009 |
| 7514313 |
Process of forming an electronic device including a seed layer and a semiconductor layer selectively formed over the seed layer |
Apr. 7, 2009 |
| 7510943 |
Semiconductor devices and methods of manufacture thereof |
Mar. 31, 2009 |
| 7494841 |
Solution-based deposition process for metal chalcogenides |
Feb. 24, 2009 |
| 7491615 |
Method of fabricating strained-silicon transistors and strained-silicon CMOS transistors |
Feb. 17, 2009 |
| 7485923 |
SOI semiconductor device with improved halo region and manufacturing method of the same |
Feb. 3, 2009 |
| 7482216 |
Substrate engineering for optimum CMOS device performance |
Jan. 27, 2009 |
| 7479422 |
Semiconductor device with stressors and method therefor |
Jan. 20, 2009 |
| 7479688 |
STI stress modification by nitrogen plasma treatment for improving performance in small width devices |
Jan. 20, 2009 |
| 7452825 |
Method of forming a mask structure and method of forming a minute pattern using the same |
Nov. 18, 2008 |
| 7449373 |
Method of ion implanting for tri-gate devices |
Nov. 11, 2008 |
| 7439140 |
Formation of standard voltage threshold and low voltage threshold MOSFET devices |
Oct. 21, 2008 |
| 7432160 |
Semiconductor devices including transistors having three dimensional channels and methods of fabricating the same |
Oct. 7, 2008 |
| 7432167 |
Method of fabricating a strained silicon channel metal oxide semiconductor transistor |
Oct. 7, 2008 |
| 7416931 |
Methods for fabricating a stress enhanced MOS circuit |
Aug. 26, 2008 |
| 7413946 |
Formation of standard voltage threshold and low voltage threshold MOSFET devices |
Aug. 19, 2008 |
| 7410876 |
Methodology to reduce SOI floating-body effect |
Aug. 12, 2008 |
| 7411245 |
Spacer barrier structure to prevent spacer voids and method for forming the same |
Aug. 12, 2008 |
| 7402496 |
Complementary metal-oxide-semiconductor device and fabricating method thereof |
Jul. 22, 2008 |
| 7402497 |
Transistor device having an increased threshold stability without drive current degradation |
Jul. 22, 2008 |
| 7371630 |
Patterned backside stress engineering for transistor performance optimization |
May. 13, 2008 |
| 7371648 |
Method for manufacturing a transistor device having an improved breakdown voltage and a method for manufacturing an integrated circuit using the same |
May. 13, 2008 |
| 7335948 |
Integrated circuit incorporating higher voltage devices and low voltage devices therein |
Feb. 26, 2008 |
| 7314789 |
Structure and method to generate local mechanical gate stress for MOSFET channel mobility modification |
Jan. 1, 2008 |
| 7288451 |
Method and structure for forming self-aligned, dual stress liner for CMOS devices |
Oct. 30, 2007 |
| 7282402 |
Method of making a dual strained channel semiconductor device |
Oct. 16, 2007 |
| 7279406 |
Tailoring channel strain profile by recessed material composition control |
Oct. 9, 2007 |
| 7265002 |
Method for making a semiconductor device including a MOSFET having a band-engineered superlattice with a semiconductor cap layer providing a channel |
Sep. 4, 2007 |
| 7265012 |
Formation of standard voltage threshold and low voltage threshold MOSFET devices |
Sep. 4, 2007 |
| 7250332 |
Method for fabricating a semiconductor device having improved hot carrier immunity ability |
Jul. 31, 2007 |
| 7247532 |
High voltage transistor and method for fabricating the same |
Jul. 24, 2007 |
| 7232744 |
Method for implanting dopants within a substrate by tilting the substrate relative to the implant source |
Jun. 19, 2007 |
| 7220626 |
Structure and method for manufacturing planar strained Si/SiGe substrate with multiple orientations and different stress levels |
May. 22, 2007 |
| 7211869 |
Increasing carrier mobility in NFET and PFET transistors on a common wafer |
May. 1, 2007 |
|
|
|
 |
|
 |
|
| |
Randomly Featured Patents |
|
