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Class Information
Number: 257/E21.626
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components or integrated circuits formed in, or on, common substrate (epo) > With subsequent division of substrate into plural individual devices (epo) > To produce devices each consisting of plurality of components, e.g., integrated circuits (epo) > Substrate being semiconductor, using silicon technology (epo) > Field-effect technology (epo) > Mis technology (epo) > With particular manufacturing method of gate sidewall spacers, e.g., double spacers, particular spacer material or shape (epo)
Description: This subclass is indented under subclass E21.616. This subclass is substantially the same in scope as ECLA classification H01L21/8234S.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7626248 |
Semiconductor package with a controlled impedance bus |
Dec. 1, 2009 |
| 7611952 |
Method of manufacturing semiconductor device having side wall spacers |
Nov. 3, 2009 |
| 7605044 |
Method of manufacturing semiconductor device |
Oct. 20, 2009 |
| 7598142 |
CMOS device with dual-epi channels and self-aligned contacts |
Oct. 6, 2009 |
| 7585734 |
Method of fabricating multi-gate transistor and multi-gate transistor fabricated thereby |
Sep. 8, 2009 |
| 7579246 |
Semiconductor device manufacturing method including oblique ion implantation process and reticle pattern forming method |
Aug. 25, 2009 |
| 7579282 |
Method for removing metal foot during high-k dielectric/metal gate etching |
Aug. 25, 2009 |
| 7572693 |
Methods for transistor formation using selective gate implantation |
Aug. 11, 2009 |
| 7572719 |
Semiconductor device and manufacturing method thereof |
Aug. 11, 2009 |
| 7566924 |
Semiconductor device with gate spacer of positive slope and fabrication method thereof |
Jul. 28, 2009 |
| 7560353 |
Methods of fabricating memory devices with memory cell transistors having gate sidewall spacers with different dielectric properties |
Jul. 14, 2009 |
| 7544573 |
Semiconductor device including MOS field effect transistor having offset spacers or gate sidewall films on either side of gate electrode and method of manufacturing the same |
Jun. 9, 2009 |
| 7537988 |
Differential offset spacer |
May. 26, 2009 |
| 7517767 |
Forming conductive stud for semiconductive devices |
Apr. 14, 2009 |
| 7514331 |
Method of manufacturing gate sidewalls that avoids recessing |
Apr. 7, 2009 |
| 7510923 |
Slim spacer implementation to improve drive current |
Mar. 31, 2009 |
| 7511340 |
Semiconductor devices having gate structures and contact pads that are lower than the gate structures |
Mar. 31, 2009 |
| 7501325 |
Method for fabricating semiconductor device |
Mar. 10, 2009 |
| 7482660 |
Nonvolatile semiconductor memory with transistor whose gate electrode has bird's beak |
Jan. 27, 2009 |
| 7482236 |
Structure and method for a sidewall SONOS memory device |
Jan. 27, 2009 |
| 7482231 |
Manufacturing of memory array and periphery |
Jan. 27, 2009 |
| 7479436 |
Feed forward silicide control scheme based on spacer height controlling preclean time |
Jan. 20, 2009 |
| 7470606 |
Masking methods |
Dec. 30, 2008 |
| 7462899 |
Semiconductor memory device having local etch stopper and method of manufacturing the same |
Dec. 9, 2008 |
| 7456066 |
Variable width offset spacers for mixed signal and system on chip devices |
Nov. 25, 2008 |
| 7449403 |
Method for manufacturing semiconductor device |
Nov. 11, 2008 |
| 7446007 |
Multi-layer spacer with inhibited recess/undercut and method for fabrication thereof |
Nov. 4, 2008 |
| 7439124 |
Method of manufacturing a semiconductor device and semiconductor device |
Oct. 21, 2008 |
| 7435683 |
Apparatus and method for selectively recessing spacers on multi-gate devices |
Oct. 14, 2008 |
| 7432120 |
Method for realizing a hosting structure of nanometric elements |
Oct. 7, 2008 |
| 7410872 |
Sealing method for electronic devices formed on a common semiconductor substrate and corresponding circuit structure |
Aug. 12, 2008 |
| 7405119 |
Structure and method for a sidewall SONOS memory device |
Jul. 29, 2008 |
| 7399690 |
Methods of fabricating semiconductor devices and structures thereof |
Jul. 15, 2008 |
| 7399663 |
Embedded strain layer in thin SOI transistors and a method of forming the same |
Jul. 15, 2008 |
| 7387921 |
Method of manufacturing semiconductor device |
Jun. 17, 2008 |
| 7361587 |
Semiconductor contact and nitride spacer formation system and method |
Apr. 22, 2008 |
| 7358128 |
Method for manufacturing a transistor |
Apr. 15, 2008 |
| 7354837 |
Fabrication method for single and dual gate spacers on a semiconductor device |
Apr. 8, 2008 |
| 7354839 |
Gate structure and a transistor having asymmetric spacer elements and methods of forming the same |
Apr. 8, 2008 |
| 7338872 |
Method of depositing a layer of a material on a substrate |
Mar. 4, 2008 |
| 7309633 |
Semiconductor device including MOS field effect transistor having offset spacers or gate sidewall films on either side of gate electrode and method of manufacturing the same |
Dec. 18, 2007 |
| 7306996 |
Methods of fabricating a semiconductor device having a metal gate pattern |
Dec. 11, 2007 |
| 7303962 |
Fabricating method of CMOS and MOS device |
Dec. 4, 2007 |
| 7294581 |
Method for fabricating silicon nitride spacer structures |
Nov. 13, 2007 |
| 7291895 |
Integrated circuitry |
Nov. 6, 2007 |
| 7271049 |
Method of forming self-aligned low-k gate cap |
Sep. 18, 2007 |
| 7268393 |
Semiconductor devices and methods of manufacturing the same |
Sep. 11, 2007 |
| 7256095 |
High voltage metal-oxide-semiconductor transistor devices and method of making the same |
Aug. 14, 2007 |
| 7244642 |
Method to obtain fully silicided gate electrodes |
Jul. 17, 2007 |
| 7230296 |
Self-aligned low-k gate cap |
Jun. 12, 2007 |
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