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Class Information
Number: 257/E21.611
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components or integrated circuits formed in, or on, common substrate (epo) > With subsequent division of substrate into plural individual devices (epo) > To produce devices each consisting of plurality of components, e.g., integrated circuits (epo) > Substrate being semiconductor, using silicon technology (epo) > Bipolar technology (epo) > Complementary devices, e.g., complementary transistors (epo)
Description: This subclass is indented under subclass E21.608. This subclass is substantially the same in scope as ECLA classification H01L21/8228.










Sub-classes under this class:

Class Number Class Name Patents
257/E21.612 Complementary vertical transistors (epo) 98


Patents under this class:

Patent Number Title Of Patent Date Issued
8574979 Method for integrating silicon germanium and carbon doped silicon with source/drain regions in a strained CMOS process flow Nov. 5, 2013
8530286 Low power semiconductor transistor structure and method of fabrication thereof Sep. 10, 2013
8531001 Complementary bipolar inverter Sep. 10, 2013
8482070 Silicon-on-insulator CMOS integrated circuit with multiple threshold voltages and a method for designing the same Jul. 9, 2013
8470674 Structure, method and system for complementary strain fill for integrated circuit chips Jun. 25, 2013
8466501 Asymmetric silicon-on-insulator (SOI) junction field effect transistor (JFET) and a method of forming the asymmetrical SOI JFET Jun. 18, 2013
8373199 Semiconductor device having a SiGe feature and a metal gate stack Feb. 12, 2013
8367495 Method for forming CMOS transistors having metal-containing gate electrodes formed on a high-K gate dielectric material Feb. 5, 2013
8030151 Configuration and fabrication of semiconductor structure having bipolar junction transistor in which non-monocrystalline semiconductor spacing portion controls base-link length Oct. 4, 2011
8003467 Method for making a semiconductor device having metal gate stacks Aug. 23, 2011
7956418 ESD protection devices Jun. 7, 2011
7952147 Semiconductor device having analog transistor with improved operating and flicker noise characteristics and method of making same May. 31, 2011
7829407 Method of fabricating a stressed MOSFET by bending SOI region Nov. 9, 2010
7804134 MOSFET on SOI device Sep. 28, 2010
7795082 Method of fabricating thin film transistor Sep. 14, 2010
7763510 Method for PFET enhancement Jul. 27, 2010
7691700 Multi-stage implant to improve device characteristics Apr. 6, 2010
7691698 Pseudomorphic Si/SiGe/Si body device with embedded SiGe source/drain Apr. 6, 2010
7491624 Method of manufacturing low CTE substrates for use with low-k flip-chip package devices Feb. 17, 2009
7476941 Semiconductor integrated circuit device and fabrication process thereof Jan. 13, 2009
7422937 Semiconductor device and manufacturing method thereof Sep. 9, 2008
7320909 Methods of fabricating integrated circuit devices having contact holes exposing gate electrodes in active regions Jan. 22, 2008
7195984 Reduce 1/f noise in NPN transistors without degrading the properties of PNP transistors in integrated circuit technologies Mar. 27, 2007
7026221 Method of forming semiconductor device with bipolar transistor having lateral structure Apr. 11, 2006
6933202 Method for integrating SiGe NPN and vertical PNP devices on a substrate and related structure Aug. 23, 2005
6861325 Methods for fabricating CMOS-compatible lateral bipolar junction transistors Mar. 1, 2005
6657279 PNP lateral bipolar electronic device and corresponding manufacturing process Dec. 2, 2003
6638807 Technique for gated lateral bipolar transistors Oct. 28, 2003
6573146 Methods of manufacturing complementary bipolar transistors Jun. 3, 2003
6545337 Semiconductor integrated circuit device Apr. 8, 2003
6528379 Method for manufacturing semiconductor integrated circuit device Mar. 4, 2003
6436780 Semiconductor device Aug. 20, 2002
6333237 Method for manufacturing a semiconductor device Dec. 25, 2001
6326674 Integrated injection logic devices including injection regions and tub or sink regions Dec. 4, 2001
6307235 Another technique for gated lateral bipolar transistors Oct. 23, 2001
6291303 Method for manufacturing a bipolar junction device Sep. 18, 2001
6222249 Semiconductor device Apr. 24, 2001
6146956 PNP lateral bipolar electronic device and corresponding manufacturing process Nov. 14, 2000
6146957 Method of manufacturing a semiconductor device having a buried region with higher impurity concentration Nov. 14, 2000
6005283 Complementary bipolar transistors Dec. 21, 1999
5930635 Complementary Si/SiGe heterojunction bipolar technology Jul. 27, 1999
5892264 High frequency analog transistors, method of fabrication and circuit implementation Apr. 6, 1999
5830799 Method for forming embedded diffusion layers using an alignment mark Nov. 3, 1998
5807780 High frequency analog transistors method of fabrication and circuit implementation Sep. 15, 1998
5776814 Process for doping two levels of a double poly bipolar transistor after formation of second poly layer Jul. 7, 1998
5686322 Process for doping two levels of a double poly bipolar transistor after formation of second poly layer Nov. 11, 1997
5670394 Method of making bipolar transistor having amorphous silicon contact as emitter diffusion source Sep. 23, 1997
5668397 High frequency analog transistors, method of fabrication and circuit implementation Sep. 16, 1997
5629219 Method for making a complementary bipolar transistor May. 13, 1997
5614422 Process for doping two levels of a double poly bipolar transistor after formation of second poly layer Mar. 25, 1997











 
 
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