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Class Information
Number: 257/E21.597
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) > Formed through semiconductor substrate (epo)
Description: This subclass is indented under subclass E21.575. This subclass is substantially the same in scope as ECLA classification H01L21/768T.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7432199 |
Method of fabricating semiconductor device having reduced contact resistance |
Oct. 7, 2008 |
| 7429529 |
Methods of forming through-wafer interconnects and structures resulting therefrom |
Sep. 30, 2008 |
| 7427560 |
Top layers of metal for high performance IC's |
Sep. 23, 2008 |
| 7411305 |
Interconnect structure encased with high and low k interlevel dielectrics |
Aug. 12, 2008 |
| 7405146 |
Electroplating method by transmitting electric current from a ball side |
Jul. 29, 2008 |
| 7385283 |
Three dimensional integrated circuit and method of making the same |
Jun. 10, 2008 |
| 7378342 |
Methods for forming vias varying lateral dimensions |
May. 27, 2008 |
| 7371602 |
Semiconductor package structure and method for manufacturing the same |
May. 13, 2008 |
| 7371682 |
Production method for electronic component and electronic component |
May. 13, 2008 |
| 7361596 |
Semiconductor processing methods |
Apr. 22, 2008 |
| 7354798 |
Three-dimensional device fabrication method |
Apr. 8, 2008 |
| 7352066 |
Silicon based optical vias |
Apr. 1, 2008 |
| 7344938 |
Method of fabricating memory |
Mar. 18, 2008 |
| 7344994 |
Multiple layer etch stop and etching method |
Mar. 18, 2008 |
| 7341938 |
Single mask via method and device |
Mar. 11, 2008 |
| 7338853 |
High power radio frequency integrated circuit capable of impeding parasitic current loss |
Mar. 4, 2008 |
| 7335592 |
Wafer level package, multi-package stack, and method of manufacturing the same |
Feb. 26, 2008 |
| 7323410 |
Dry etchback of interconnect contacts |
Jan. 29, 2008 |
| 7323785 |
Semiconductor device |
Jan. 29, 2008 |
| 7320934 |
Method of forming a contact in a flash memory device |
Jan. 22, 2008 |
| 7312530 |
Semiconductor device with multilayered metal pattern |
Dec. 25, 2007 |
| 7304377 |
Package substrate, integrated circuit apparatus, substrate unit, surface acoustic wave apparatus, and circuit device |
Dec. 4, 2007 |
| 7300857 |
Through-wafer interconnects for photoimager and memory wafers |
Nov. 27, 2007 |
| 7282444 |
Semiconductor chip and manufacturing method for the same, and semiconductor device |
Oct. 16, 2007 |
| 7279776 |
Method of manufacturing semiconductor device and semiconductor device |
Oct. 9, 2007 |
| 7276787 |
Silicon chip carrier with conductive through-vias and method for fabricating same |
Oct. 2, 2007 |
| 7265023 |
Fabrication method for a semiconductor structure |
Sep. 4, 2007 |
| 7265052 |
Methods of forming conductive through-wafer vias |
Sep. 4, 2007 |
| 7256497 |
Semiconductor device with a barrier layer and a metal layer |
Aug. 14, 2007 |
| 7232754 |
Microelectronic devices and methods for forming interconnects in microelectronic devices |
Jun. 19, 2007 |
| 7230318 |
RF and MMIC stackable micro-modules |
Jun. 12, 2007 |
| 7211510 |
Stacking circuit elements |
May. 1, 2007 |
| 7208410 |
Methods relating to forming interconnects |
Apr. 24, 2007 |
| 7192864 |
Method of forming interconnection lines for semiconductor device |
Mar. 20, 2007 |
| 7176127 |
Method of manufacturing semiconductor device having through hole with adhesion layer thereon |
Feb. 13, 2007 |
| 7074715 |
Use of photoresist in substrate vias during backside grind |
Jul. 11, 2006 |
| 7071031 |
Three-dimensional integrated CMOS-MEMS device and process for making the same |
Jul. 4, 2006 |
| 7071098 |
Methods of fabricating interconnects for semiconductor components including a through hole entirely through the component and forming a metal nitride including separate precursor cycles |
Jul. 4, 2006 |
| 7067353 |
Method for manufacturing semiconductor package having electrodes penetrating through semiconductor wafer |
Jun. 27, 2006 |
| 7060526 |
Wafer level methods for fabricating multi-dice chip scale semiconductor components |
Jun. 13, 2006 |
| 7060624 |
Deep filled vias |
Jun. 13, 2006 |
| 7061118 |
Semiconductor device, stacked semiconductor device, methods of manufacturing the same, circuit board, and electronic instrument |
Jun. 13, 2006 |
| 7056813 |
Methods of forming backside connections on a wafer stack |
Jun. 6, 2006 |
| 7057133 |
Methods of drilling through-holes in homogenous and non-homogenous substrates |
Jun. 6, 2006 |
| 7057274 |
Semiconductor structures having through-holes sealed with feed-through metalization |
Jun. 6, 2006 |
| 7049223 |
Paste including a mixture of powders, connection plug, burying method, and semiconductor device manufacturing method |
May. 23, 2006 |
| 7045443 |
Method for manufacturing semiconductor device, semiconductor device, circuit board, and electronic apparatus |
May. 16, 2006 |
| 7037804 |
Wafer bonding using a flexible bladder press for three dimensional (3D) vertical stack integration |
May. 2, 2006 |
| 7037755 |
Three dimensional device integration method and integrated device |
May. 2, 2006 |
| 7030010 |
Methods for creating electrophoretically insulated vias in semiconductive substrates and resulting structures |
Apr. 18, 2006 |
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