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Class Information
Number: 257/E21.595
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) > Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) > Modifying pattern or conductivity of conductive members, e.g., formation of alloys, reduction of contact resistances (epo) > Modifying pattern (epo)
Description: This subclass is indented under subclass E21.591. This subclass is substantially the same in scope as ECLA classification H01L21/768C8L.
Sub-classes under this class:
Patents under this class:
Patent Number |
Title Of Patent |
Date Issued |
8492278 |
Method of forming a plurality of spaced features |
Jul. 23, 2013 |
8399970 |
Semiconductor device attached to island having protrusion |
Mar. 19, 2013 |
8310055 |
Semiconductor devices having narrow conductive line patterns and related methods of forming such semiconductor devices |
Nov. 13, 2012 |
8288871 |
Reduced-stress bump-on-trace (BOT) structures |
Oct. 16, 2012 |
8043964 |
Method for providing electrical connections to spaced conductive lines |
Oct. 25, 2011 |
7745237 |
Pattern forming method and pattern forming system |
Jun. 29, 2010 |
7432198 |
Semiconductor devices and methods of forming interconnection lines therein |
Oct. 7, 2008 |
7422972 |
On chip heating for electrical trimming of polysilicon and polysilicon-silicon-germanium resistors and electrically programmable fuses for integrated circuits |
Sep. 9, 2008 |
7393721 |
Semiconductor chip with metallization levels, and a method for formation in interconnect structures |
Jul. 1, 2008 |
7205566 |
Transistor-level signal cutting method and structure |
Apr. 17, 2007 |
7026198 |
Focused ion beam treatment method and semiconductor device suitable for its implementation |
Apr. 11, 2006 |
6991970 |
Method and apparatus for circuit completion through the use of ball bonds or other connections during the formation of semiconductor device |
Jan. 31, 2006 |
6982227 |
Single and multilevel rework |
Jan. 3, 2006 |
6958289 |
Method of forming metal line in semiconductor device |
Oct. 25, 2005 |
6952014 |
End-point detection for FIB circuit modification |
Oct. 4, 2005 |
6903390 |
Single metal programmability in a customizable integrated circuit device |
Jun. 7, 2005 |
6809332 |
Electronic device and defect repair method thereof |
Oct. 26, 2004 |
6794701 |
Non-volatile memory |
Sep. 21, 2004 |
6759894 |
Method and circuit for controlling fuse blow |
Jul. 6, 2004 |
6753253 |
Method of making wiring and logic corrections on a semiconductor device by use of focused ion beams |
Jun. 22, 2004 |
6734511 |
Auto sensor function chip |
May. 11, 2004 |
6692995 |
Physically deposited layer to electrically connect circuit edit connection targets |
Feb. 17, 2004 |
6674168 |
Single and multilevel rework |
Jan. 6, 2004 |
6653240 |
FIB/RIE method for in-line circuit modification of microelectronic chips containing organic dielectric |
Nov. 25, 2003 |
6620694 |
Method of making non volatile memory with a protective metal line |
Sep. 16, 2003 |
6589860 |
System and method for calibrating electron beam defect inspection tool |
Jul. 8, 2003 |
6582579 |
Methods for repairing defects on a semiconductor substrate |
Jun. 24, 2003 |
6580072 |
Method for performing failure analysis on copper metallization |
Jun. 17, 2003 |
6559544 |
Programmable interconnect for semiconductor devices |
May. 6, 2003 |
6555204 |
Method of preventing bridging between polycrystalline micro-scale features |
Apr. 29, 2003 |
6528416 |
Semiconductor device and method of making utilizing hemispherical grain silicon technology |
Mar. 4, 2003 |
6495443 |
Method of re-working copper damascene wafers |
Dec. 17, 2002 |
6468917 |
Method for modifying a C4 semiconductor device |
Oct. 22, 2002 |
6459136 |
Single metal programmability in a customizable integrated circuit device |
Oct. 1, 2002 |
6455423 |
Direct writing of low carbon conductive material |
Sep. 24, 2002 |
6433403 |
Integrated circuit having temporary conductive path structure and method for forming the same |
Aug. 13, 2002 |
6434063 |
Method of repairing semiconductor memory, electron-beam memory repairing apparatus and redundancy memory circuit to which the method of repairing semiconductor memory is applicable |
Aug. 13, 2002 |
6420785 |
Bus line wiring structure in a semiconductor device and method of manufacturing the same |
Jul. 16, 2002 |
6388334 |
System and method for circuit rebuilding via backside access |
May. 14, 2002 |
6359325 |
Method of forming nano-scale structures from polycrystalline materials and nano-scale structures formed thereby |
Mar. 19, 2002 |
6346748 |
Electronic circuit structure with photoresist layer that has non-precision openings formed by a laser |
Feb. 12, 2002 |
6340601 |
Method for reworking copper metallurgy in semiconductor devices |
Jan. 22, 2002 |
6323076 |
Integrated circuit having temporary conductive path structure and method for forming the same |
Nov. 27, 2001 |
6309798 |
Lithographical process for production of nanostructures on surfaces |
Oct. 30, 2001 |
6309897 |
Method and apparatus providing a circuit edit structure through the back side of an integrated circuit die |
Oct. 30, 2001 |
6291281 |
Method of fabricating protection structure |
Sep. 18, 2001 |
6274934 |
Semiconductor device and method of manufacturing thereof |
Aug. 14, 2001 |
6268608 |
Method and apparatus for selective in-situ etching of inter dielectric layers |
Jul. 31, 2001 |
6261850 |
Direct writing of low carbon conductive material |
Jul. 17, 2001 |
6245610 |
Method of protecting a well at a floating stage |
Jun. 12, 2001 |
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