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Class Information
Number: 257/E21.59
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) > Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) > Local interconnects; local pads (epo)
Description: This subclass is indented under subclass E21.582. This subclass is substantially the same in scope as ECLA classification H01L21/768C10.


Patents under this class:

Patent Number Title Of Patent Date Issued
6479378 Process for forming electrical interconnects in integrated circuits Nov. 12, 2002
6476488 Method for fabricating borderless and self-aligned polysilicon and metal contact landing plugs for multilevel interconnections Nov. 5, 2002
6476490 Contact openings, electrical connections and interconnections for integrated circuitry Nov. 5, 2002
6472303 Method of forming a contact plug for a semiconductor device Oct. 29, 2002
6468855 Reduced topography DRAM cell fabricated using a modified logic process and method for operating same Oct. 22, 2002
6468857 Method for forming a semiconductor device having a plurality of circuits parts Oct. 22, 2002
6468883 Semiconductor processing methods of forming contact openings, methods of forming electrical connections and interconnections Oct. 22, 2002
6468899 Contactless local interconnect process utilizing self-aligned silicide Oct. 22, 2002
6468905 Methods of restricting silicon migration Oct. 22, 2002
6468919 Method of making a local interconnect in an embedded memory Oct. 22, 2002
6469336 Structure for reducing contact aspect ratios Oct. 22, 2002
6465310 Methods of forming self-aligned contact pads on electrically conductive lines Oct. 15, 2002
6465364 Method for fabrication of a contact plug in an embedded memory Oct. 15, 2002
6461951 Method of forming a sidewall spacer to prevent gouging of device junctions during interlayer dielectric etching including silicide growth over gate spacers Oct. 8, 2002
6462395 Semiconductor device and method of producing the same Oct. 8, 2002
6462403 Semiconductor device comprising thin film transistors having a passivation film formed thereon Oct. 8, 2002
6458680 Method of fabricating contact pads of a semiconductor device Oct. 1, 2002
6455407 Methods of forming memory circuitry, methods of forming electrical connections, and methods of forming dynamic random access memory (DRAM) circuitry Sep. 24, 2002
6455918 Integrated circuitry Sep. 24, 2002
6451634 Method of fabricating a multistack 3-dimensional high density semiconductor device Sep. 17, 2002
6451651 Method of manufacturing DRAM device invention Sep. 17, 2002
6448179 Method for fabricating semiconductor device Sep. 10, 2002
6448631 Cell architecture with local interconnect and method for making same Sep. 10, 2002
6444520 Method of forming dual conductive plugs Sep. 3, 2002
6440781 Method of adding bias-independent aluminum bridged anti-fuses to a tungsten plug process Aug. 27, 2002
6440795 Hemispherical grained silicon on conductive nitride Aug. 27, 2002
6440826 NiSi contacting extensions of active regions Aug. 27, 2002
6441320 Electrically conductive projections having conductive coverings Aug. 27, 2002
6441419 Encapsulated-metal vertical-interdigitated capacitor and damascene method of manufacturing same Aug. 27, 2002
6436746 Transistor having an improved gate structure and method of construction Aug. 20, 2002
6436758 Method for forming storage node contact plug of DRAM (dynamic random access memory) Aug. 20, 2002
6436805 Local interconnect structures and methods for making the same Aug. 20, 2002
6437391 Capacitor for semiconductor devices Aug. 20, 2002
6432764 Methods of forming resistors Aug. 13, 2002
6433381 Semiconductor device and method of manufacturing the same Aug. 13, 2002
6433397 N-channel metal oxide semiconductor (NMOS) driver circuit and method of making same Aug. 13, 2002
6429520 Semiconductor component with silicon wiring and method of fabricating the component Aug. 6, 2002
6429124 Local interconnect structures for integrated circuits and methods for making the same Aug. 6, 2002
6426249 Buried metal dual damascene plate capacitor Jul. 30, 2002
6426263 Method for making a merged contact window in a transistor to electrically connect the gate to either the source or the drain Jul. 30, 2002
6426528 Method of fabricating conductive straps to interconnect contacts to corresponding digit lines by employing an angled sidewall implant and semiconductor devices fabricated thereby Jul. 30, 2002
6426558 Metallurgy for semiconductor devices Jul. 30, 2002
6423606 Semiconductor processing methods, methods of forming a resistor and methods of forming a diode Jul. 23, 2002
6423620 SEMICONDUCTOR PROCESSING METHODS OF FORMING CONTACT OPENINGS, METHODS OF FORMING MEMORY CIRCUITRY, METHODS OF FORMING ELECTRICAL CONNECTIONS, AND METHODS OF FORMING DYNAMIC RANDOM ACCESS MEMOR Jul. 23, 2002
6420227 Semiconductor integrated circuit device and process for manufacture of the same Jul. 16, 2002
6420273 Self-aligned etch-stop layer formation for semiconductor devices Jul. 16, 2002
6420746 Three device DRAM cell with integrated capacitor and local interconnect Jul. 16, 2002
6420749 Trench field shield in trench isolation Jul. 16, 2002
6417104 Method for making a low resistivity electrode having a near noble metal Jul. 9, 2002
6413832 Method for forming inner-cylindrical capacitor without top electrode mask Jul. 2, 2002



 
 
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