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Class Information
Number: 257/E21.59
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) > Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) > Local interconnects; local pads (epo)
Description: This subclass is indented under subclass E21.582. This subclass is substantially the same in scope as ECLA classification H01L21/768C10.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6781177 |
Semiconductor device and method for fabricating the same |
Aug. 24, 2004 |
| 6776622 |
Conductive contact structure and process for producing the same |
Aug. 17, 2004 |
| 6777758 |
Semiconductor device |
Aug. 17, 2004 |
| 6777812 |
Semiconductor devices having protected plug contacts and upper interconnections |
Aug. 17, 2004 |
| 6774022 |
Method of passivating an oxide surface subjected to a conductive material anneal |
Aug. 10, 2004 |
| 6774033 |
Metal stack for local interconnect layer |
Aug. 10, 2004 |
| 6774413 |
Integrated circuit structure with programmable connector/isolator |
Aug. 10, 2004 |
| 6770972 |
Method for electrical interconnection employing salicide bridge |
Aug. 3, 2004 |
| 6767785 |
Method of making a resistor, method of making a diode, and SRAM circuitry and other integrated circuitry |
Jul. 27, 2004 |
| 6764934 |
Semiconductor processing methods of forming contact openings, methods of forming memory circuitry, methods of forming electrical connections, and methods of forming dynamic random |
Jul. 20, 2004 |
| 6765269 |
Conformal surface silicide strap on spacer and method of making same |
Jul. 20, 2004 |
| 6759315 |
Method for selective trimming of gate structures and apparatus formed thereby |
Jul. 6, 2004 |
| 6759343 |
Method and composition for selectively etching against cobalt silicide |
Jul. 6, 2004 |
| 6753241 |
Semiconductor processing methods of forming contact openings, methods of forming electrical connections and interconnections, and integrated circuitry |
Jun. 22, 2004 |
| 6753243 |
SEMICONDUCTOR PROCESSING METHODS OF FORMING CONTACT OPENINGS, METHODS OF FORMING MEMORY CIRCUITRY, METHODS OF FORMING ELECTRICAL CONNECTIONS, AND METHODS OF FORMING DYNAMIC RANDOM ACCESS MEMOR |
Jun. 22, 2004 |
| 6753252 |
Contact plug formation for devices with stacked capacitors |
Jun. 22, 2004 |
| 6753559 |
Transistor having improved gate structure |
Jun. 22, 2004 |
| 6750494 |
Semiconductor buried contact with a removable spacer |
Jun. 15, 2004 |
| 6743682 |
Method of manufacturing a semiconductor device |
Jun. 1, 2004 |
| 6744096 |
Non-volatile memory device having a bit line contact pad and method for manufacturing the same |
Jun. 1, 2004 |
| 6744676 |
DRAM cell having a capacitor structure fabricated partially in a cavity and method for operating same |
Jun. 1, 2004 |
| 6740587 |
Semiconductor device having a metal silicide layer and method for manufacturing the same |
May. 25, 2004 |
| 6740942 |
Permanently on transistor implemented using a double polysilicon layer CMOS process with buried contact |
May. 25, 2004 |
| 6737347 |
Semiconductor device with fully self-aligned local interconnects, and method for fabricating the device |
May. 18, 2004 |
| 6737694 |
Ferroelectric memory device and method of forming the same |
May. 18, 2004 |
| 6734459 |
Semiconductor memory cell |
May. 11, 2004 |
| 6734483 |
Process for fabricating a capacitor within an integrated circuit, and corresponding integrated circuit |
May. 11, 2004 |
| 6730553 |
Methods for making semiconductor structures having high-speed areas and high-density areas |
May. 4, 2004 |
| 6730950 |
Local interconnect using the electrode of a ferroelectric |
May. 4, 2004 |
| 6730975 |
DRAM device |
May. 4, 2004 |
| 6731494 |
Capacitor and method for fabricating the same and semiconductor device |
May. 4, 2004 |
| 6727168 |
Method of forming local interconnects |
Apr. 27, 2004 |
| 6723588 |
Method for fabricating SRAM cell |
Apr. 20, 2004 |
| 6724085 |
Semiconductor device with reduced resistance plug wire for interconnection |
Apr. 20, 2004 |
| 6720269 |
Semiconductor device having a self-aligned contact structure and methods of forming the same |
Apr. 13, 2004 |
| 6720609 |
Structure for reducing contact aspect ratios |
Apr. 13, 2004 |
| 6716732 |
Method for fabricating a contact pad of semiconductor device |
Apr. 6, 2004 |
| 6713872 |
Multilayered semiconductor device |
Mar. 30, 2004 |
| 6709918 |
Method for making a metal-insulator-metal (MIM) capacitor and metal resistor for a copper back-end-of-line (BEOL) technology |
Mar. 23, 2004 |
| 6709945 |
Reduced aspect ratio digit line contact process flow used during the formation of a semiconductor device |
Mar. 23, 2004 |
| 6710422 |
Semiconductor device and method of manufacturing the same |
Mar. 23, 2004 |
| 6707117 |
Method of providing semiconductor interconnects using silicide exclusion |
Mar. 16, 2004 |
| 6706633 |
Method of forming a self-aligned contact pad for use in a semiconductor device |
Mar. 16, 2004 |
| 6703668 |
Local interconnect formed using silicon spacer |
Mar. 9, 2004 |
| 6699726 |
Semiconductor device and method for the manufacture thereof |
Mar. 2, 2004 |
| 6699751 |
Method of fabricating a capacitor for semiconductor devices |
Mar. 2, 2004 |
| 6700205 |
Semiconductor devices having contact plugs and local interconnects |
Mar. 2, 2004 |
| 6700211 |
Method for forming conductors in semiconductor devices |
Mar. 2, 2004 |
| 6696722 |
Storage node of DRAM cell |
Feb. 24, 2004 |
| 6696732 |
Semiconductor device having S/D to S/D connection and isolation region between two semiconductor elements |
Feb. 24, 2004 |
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