| |
 |
|
Class Information
Number: 257/E21.59
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) > Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) > Local interconnects; local pads (epo)
Description: This subclass is indented under subclass E21.582. This subclass is substantially the same in scope as ECLA classification H01L21/768C10.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6872612 |
Local interconnect for integrated circuit |
Mar. 29, 2005 |
| 6869872 |
Method of manufacturing a semiconductor memory device having a metal contact structure |
Mar. 22, 2005 |
| 6867120 |
Method of fabricating a semiconductor device with a gold conductive layer and organic insulating layer |
Mar. 15, 2005 |
| 6867497 |
Integrated circuitry |
Mar. 15, 2005 |
| 6864138 |
Methods of forming capacitor structures and DRAM arrays |
Mar. 8, 2005 |
| 6858443 |
Methods of forming ferroelectric capacitors on protruding portions of conductive plugs having a smaller cross-sectional size than base portions thereof |
Feb. 22, 2005 |
| 6858525 |
Stacked local interconnect structure and method of fabricating same |
Feb. 22, 2005 |
| 6858934 |
Semiconductor device structures including metal silicide interconnect structures that extend at least partially over transistor gate structures and methods for making the same |
Feb. 22, 2005 |
| 6855978 |
Gate-contact structure and method for forming the same |
Feb. 15, 2005 |
| 6855628 |
Semiconductor processing methods of forming contact openings, methods of forming electrical connections and interconnections, and integrated circuitry |
Feb. 15, 2005 |
| 6849484 |
Method of manufacturing semiconductor device |
Feb. 1, 2005 |
| 6849887 |
Semiconductor device and method for fabricating the same |
Feb. 1, 2005 |
| 6849889 |
Semiconductor device having storage node contact plug of DRAM (dynamic random access memory) |
Feb. 1, 2005 |
| 6846732 |
Semiconductor device fabrication method |
Jan. 25, 2005 |
| 6846736 |
Creation of subresolution features via flow characteristics |
Jan. 25, 2005 |
| 6844601 |
Local interconnect structure for integrated circuit devices, source structure for the same, and method for fabricating the same |
Jan. 18, 2005 |
| 6841444 |
Nonvolatile semiconductor memory device and manufacturing method thereof |
Jan. 11, 2005 |
| 6841472 |
Semiconductor device and method of fabricating the same |
Jan. 11, 2005 |
| 6841823 |
Self-aligned non-volatile memory cell |
Jan. 11, 2005 |
| 6838333 |
Semiconductor memory device and method of producing the same |
Jan. 4, 2005 |
| 6838732 |
Semiconductor device and method for manufacturing the same |
Jan. 4, 2005 |
| 6836019 |
Semiconductor device having multilayer interconnection structure and manufacturing method thereof |
Dec. 28, 2004 |
| 6831001 |
Method of fabricating a stacked local interconnect structure |
Dec. 14, 2004 |
| 6828616 |
Integrated circuit devices that utilize doped Poly-Si1-xGex conductive plugs as interconnects |
Dec. 7, 2004 |
| 6825082 |
Ferroelectric memory device and method of forming the same |
Nov. 30, 2004 |
| 6821864 |
Method to achieve increased trench depth, independent of CD as defined by lithography |
Nov. 23, 2004 |
| 6822282 |
Analog capacitor in dual damascene process |
Nov. 23, 2004 |
| 6822303 |
Titanium boride gate electrode and interconnect |
Nov. 23, 2004 |
| 6818932 |
Semiconductor device with improved soft error resistance |
Nov. 16, 2004 |
| 6818935 |
Semiconductor device and method for fabricating the same |
Nov. 16, 2004 |
| 6818489 |
Semiconductor device having LDD-type source/drain regions and fabrication method thereof |
Nov. 16, 2004 |
| 6818551 |
Methods of forming contact holes using multiple insulating layers |
Nov. 16, 2004 |
| 6815737 |
Method for selective trimming of gate structures and apparatus formed thereby |
Nov. 9, 2004 |
| 6806180 |
Unitary interconnection structures integral with a dielectric layer |
Oct. 19, 2004 |
| 6806575 |
Subresolution features for a semiconductor device |
Oct. 19, 2004 |
| 6803286 |
Method of forming a local interconnect |
Oct. 12, 2004 |
| 6803317 |
Method of making a vertical gate semiconductor device |
Oct. 12, 2004 |
| 6797600 |
Method of forming a local interconnect |
Sep. 28, 2004 |
| 6794244 |
Semiconductor device and method of manufacturing the same |
Sep. 21, 2004 |
| 6790663 |
Methods of contacting lines and methods of forming an electrical contact in a semiconductor device |
Sep. 14, 2004 |
| 6790721 |
Metal local interconnect self-aligned source flash cell |
Sep. 14, 2004 |
| 6790771 |
Bitline structure for DRAM and method of forming the same |
Sep. 14, 2004 |
| 6787444 |
Interconnection structures and methods of fabrication |
Sep. 7, 2004 |
| 6783694 |
Composition for selectively etching against cobalt silicide |
Aug. 31, 2004 |
| 6784045 |
Microchannel formation for fuses, interconnects, capacitors, and inductors |
Aug. 31, 2004 |
| 6784048 |
Method of fabricating a DRAM cell having a thin dielectric access transistor and a thick dielectric storage |
Aug. 31, 2004 |
| 6784067 |
Method of manufacturing semiconductor device |
Aug. 31, 2004 |
| 6784478 |
Junction capacitor structure and fabrication method therefor in a dual damascene process |
Aug. 31, 2004 |
| 6784502 |
Method of forming contacts, methods of contacting lines, methods of operating integrated circuitry, and integrated circuits |
Aug. 31, 2004 |
| 6780707 |
Method of forming semiconductor device having contact pad on source/drain region in peripheral circuit area |
Aug. 24, 2004 |
|
|
|
