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Class Information
Number: 257/E21.59
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) > Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) > Local interconnects; local pads (epo)
Description: This subclass is indented under subclass E21.582. This subclass is substantially the same in scope as ECLA classification H01L21/768C10.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 5122225 |
Selective etch method |
Jun. 16, 1992 |
| 5121186 |
Integrated circuit device having improved junction connections |
Jun. 9, 1992 |
| 5082796 |
Use of polysilicon layer for local interconnect in a CMOS or BiCMOS technology incorporating sidewall spacers |
Jan. 21, 1992 |
| 5081065 |
Method of contacting silicide tracks |
Jan. 14, 1992 |
| 5075249 |
Method of making a BIC memory cell having contact openings with straight sidewalls and sharp-edge rims |
Dec. 24, 1991 |
| 5075761 |
Local interconnect for integrated circuits |
Dec. 24, 1991 |
| 5065220 |
Metal-to-polysilicon capacitor and method for making the same |
Nov. 12, 1991 |
| 5053349 |
Method for interconnecting semiconductor devices |
Oct. 1, 1991 |
| 5010032 |
Process for making CMOS device with both P+ and N+ gates including refractory metal silicide and nitride interconnects |
Apr. 23, 1991 |
| 4994873 |
Local interconnect for stacked polysilicon device |
Feb. 19, 1991 |
| 4994402 |
Method of fabricating a coplanar, self-aligned contact structure in a semiconductor device |
Feb. 19, 1991 |
| 4992389 |
Making a self aligned semiconductor device |
Feb. 12, 1991 |
| 4983544 |
Silicide bridge contact process |
Jan. 8, 1991 |
| 4980020 |
Local interconnect etch technique |
Dec. 25, 1990 |
| 4978637 |
Local interconnect process for integrated circuits |
Dec. 18, 1990 |
| 4975756 |
SRAM with local interconnect |
Dec. 4, 1990 |
| 4971924 |
Metal plate capacitor and method for making the same |
Nov. 20, 1990 |
| 4957590 |
Method for forming local interconnects using selective anisotropy |
Sep. 18, 1990 |
| 4952521 |
Process for fabricating a semiconductor device with selective growth of a metal silicide |
Aug. 28, 1990 |
| 4933742 |
Metallization contact system for large scale integrated circuits |
Jun. 12, 1990 |
| 4931411 |
Integrated circuit process with TiN-gate transistor |
Jun. 5, 1990 |
| 4921813 |
Method for making a polysilicon transistor |
May. 1, 1990 |
| 4922311 |
Folded extended window field effect transistor |
May. 1, 1990 |
| 4912540 |
Reduced area butting contact structure |
Mar. 27, 1990 |
| 4901134 |
Semiconductor device and manufacturing method thereof |
Feb. 13, 1990 |
| 4894693 |
Single-polysilicon dram device and process |
Jan. 16, 1990 |
| 4890141 |
CMOS device with both p+ and n+ gates |
Dec. 26, 1989 |
| 4876213 |
Salicided source/drain structure |
Oct. 24, 1989 |
| 4873204 |
Method for making silicide interconnection structures for integrated circuit devices |
Oct. 10, 1989 |
| 4863559 |
Method for forming local interconnects using chlorine bearing agents |
Sep. 5, 1989 |
| 4844776 |
Method for making folded extended window field effect transistor |
Jul. 4, 1989 |
| 4821085 |
VLSI local interconnect structure |
Apr. 11, 1989 |
| 4814854 |
Integrated circuit device and process with tin-gate transistor |
Mar. 21, 1989 |
| 4811076 |
Device and process with doubled capacitors |
Mar. 7, 1989 |
| 4811078 |
Integrated circuit device and process with tin capacitors |
Mar. 7, 1989 |
| 4804636 |
Process for making integrated circuits having titanium nitride triple interconnect |
Feb. 14, 1989 |
| 4793896 |
Method for forming local interconnects using chlorine bearing agents |
Dec. 27, 1988 |
| 4755256 |
Method of producing small conductive members on a substrate |
Jul. 5, 1988 |
| 4746219 |
Local interconnect |
May. 24, 1988 |
| 4713356 |
Manufacturing MOS semiconductor device with planarized conductive layer |
Dec. 15, 1987 |
| 4693925 |
Integrated circuit structure having intermediate metal silicide layer |
Sep. 15, 1987 |
| 4690730 |
Oxide-capped titanium silicide formation |
Sep. 1, 1987 |
| 4682403 |
Method for interconnecting the active zones and gates of CMOS integrated circuits |
Jul. 28, 1987 |
| 4676866 |
Process to increase tin thickness |
Jun. 30, 1987 |
| 4675073 |
Tin etch process |
Jun. 23, 1987 |
| 4658496 |
Method for manufacturing VLSI MOS-transistor circuits |
Apr. 21, 1987 |
| 4657628 |
Process for patterning local interconnects |
Apr. 14, 1987 |
| 4625391 |
Semiconductor device and method for manufacturing the same |
Dec. 2, 1986 |
| 4581815 |
Integrated circuit structure having intermediate metal silicide layer and method of making same |
Apr. 15, 1986 |
| 4549199 |
Semiconductor device providing a contact structure which can be miniaturized |
Oct. 22, 1985 |
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