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Class Information
Number: 257/E21.59
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) > Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) > Local interconnects; local pads (epo)
Description: This subclass is indented under subclass E21.582. This subclass is substantially the same in scope as ECLA classification H01L21/768C10.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 5976767 |
Ammonium hydroxide etch of photoresist masked silicon |
Nov. 2, 1999 |
| 5976960 |
Method of forming an electrically conductive substrate interconnect continuity region with an angled implant |
Nov. 2, 1999 |
| 5977600 |
Formation of shortage protection region |
Nov. 2, 1999 |
| 5970352 |
Field effect transistor having elevated source and drain regions and methods for manufacturing the same |
Oct. 19, 1999 |
| 5970370 |
Manufacturing capping layer for the fabrication of cobalt salicide structures |
Oct. 19, 1999 |
| 5970375 |
Semiconductor fabrication employing a local interconnect |
Oct. 19, 1999 |
| 5960303 |
Process of forming titanium silicide interconnects |
Sep. 28, 1999 |
| 5958508 |
Process for forming a semiconductor device |
Sep. 28, 1999 |
| 5956585 |
Method of forming a self-aligned damage-free buried contact |
Sep. 21, 1999 |
| 5956594 |
Method for simultaneously forming capacitor plate and metal contact structures for a high density DRAM device |
Sep. 21, 1999 |
| 5956610 |
Method and system for providing electrical insulation for local interconnect in a logic circuit |
Sep. 21, 1999 |
| 5956615 |
Method of forming a metal contact to landing pad structure in an integrated circuit |
Sep. 21, 1999 |
| 5949100 |
Integrate circuit device including expanded contact holes and related structures |
Sep. 7, 1999 |
| 5945350 |
Methods for use in formation of titanium nitride interconnects and interconnects formed using same |
Aug. 31, 1999 |
| 5945738 |
Dual landing pad structure in an integrated circuit |
Aug. 31, 1999 |
| 5946569 |
DRAM contact process by localized etch-stop removal |
Aug. 31, 1999 |
| 5946595 |
Method of forming a local interconnect between electronic devices on a semiconductor substrate |
Aug. 31, 1999 |
| 5943583 |
Method for manufacturing semiconductor device |
Aug. 24, 1999 |
| 5939758 |
Semiconductor device with gate electrodes having conductive films |
Aug. 17, 1999 |
| 5940713 |
Method for constructing multiple container capacitor |
Aug. 17, 1999 |
| 5937291 |
Method for forming poly-via connection between load transistor drain and driver transistor gate in SRAM |
Aug. 10, 1999 |
| 5936306 |
TiSi.sub.2 /TiN clad interconnect technology |
Aug. 10, 1999 |
| 5933727 |
Method for increasing capacitance of an HSG rugged capacitor using a phosphine rich oxidation and subsequent wet etch |
Aug. 3, 1999 |
| 5930633 |
Integrated butt-contact process in shallow trench isolation |
Jul. 27, 1999 |
| 5926728 |
Method for fabricating tungsten polycide contacts |
Jul. 20, 1999 |
| 5923998 |
Enlarged align tolerance in buried contact process using sidewall spacer |
Jul. 13, 1999 |
| 5924008 |
Integrated circuit having local interconnect for reducing signal cross coupled noise |
Jul. 13, 1999 |
| 5924011 |
Silicide process for mixed mode product |
Jul. 13, 1999 |
| 5920098 |
Tungsten local interconnect, using a silicon nitride capped self-aligned contact process |
Jul. 6, 1999 |
| 5920796 |
In-situ etch of BARC layer during formation of local interconnects |
Jul. 6, 1999 |
| 5918118 |
Dual deposition methods for forming contact metallizations, capacitors, and memory devices |
Jun. 29, 1999 |
| 5914518 |
Method of forming a metal contact to landing pad structure in an integrated circuit |
Jun. 22, 1999 |
| 5915183 |
Raised source/drain using recess etch of polysilicon |
Jun. 22, 1999 |
| 5912188 |
Method of forming a contact hole in an interlevel dielectric layer using dual etch stops |
Jun. 15, 1999 |
| 5913126 |
Methods of forming capacitors including expanded contact holes |
Jun. 15, 1999 |
| 5913139 |
Method of manufacturing a semiconductor device with local interconnect of metal silicide |
Jun. 15, 1999 |
| 5910021 |
Manufacture of semiconductor device with fine pattens |
Jun. 8, 1999 |
| 5911114 |
Method of simultaneous formation of salicide and local interconnects in an integrated circuit structure |
Jun. 8, 1999 |
| 5907781 |
Process for fabricating an integrated circuit with a self-aligned contact |
May. 25, 1999 |
| 5905306 |
Metal contact to a novel polysilicon contact extension |
May. 18, 1999 |
| 5899742 |
Manufacturing method for self-aligned local interconnects and contacts simultaneously |
May. 4, 1999 |
| 5897345 |
Semiconductor device and process for fabricating the same |
Apr. 27, 1999 |
| 5898200 |
Microwave integrated circuit |
Apr. 27, 1999 |
| 5895269 |
Methods for preventing deleterious punch-through during local interconnect formation |
Apr. 20, 1999 |
| 5893741 |
Method for simultaneously forming local interconnect with silicided elevated source/drain MOSFET's |
Apr. 13, 1999 |
| 5894160 |
Method of forming a landing pad structure in an integrated circuit |
Apr. 13, 1999 |
| 5888887 |
Trenchless buried contact process technology |
Mar. 30, 1999 |
| 5888894 |
Method for reducing stray conductive material near vertical surfaces in semiconductor manufacturing processes |
Mar. 30, 1999 |
| 5885879 |
Thin polysilicon masking technique for improved lithography control |
Mar. 23, 1999 |
| 5882992 |
Method for fabricating Tungsten local interconnections in high density CMOS circuits |
Mar. 16, 1999 |
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