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Class Information
Number: 257/E21.59
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) > Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) > Local interconnects; local pads (epo)
Description: This subclass is indented under subclass E21.582. This subclass is substantially the same in scope as ECLA classification H01L21/768C10.


Patents under this class:
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Patent Number Title Of Patent Date Issued
6235576 Method for manufacturing a cylindrical capacitor May. 22, 2001
6235632 Tungsten plug formation May. 22, 2001
6236091 Method of forming a local interconnect with improved etch selectivity of silicon dioxide/silicide May. 22, 2001
6228711 Method of fabricating dynamic random access memory May. 8, 2001
6228738 Methods of forming capacitors structures and DRAM cells May. 8, 2001
6228761 Method of forming a local interconnect with improved etch selectivity of silicon dioxide/silicide May. 8, 2001
6229167 Semiconductor device and method of manufacturing the same May. 8, 2001
6225675 Integrated circuitry, methods of fabricating integrated circuitry, methods of forming local interconnects, and methods of forming conductive lines May. 1, 2001
6223432 Method of forming dual conductive plugs May. 1, 2001
6225160 Method of manufacturing bottom electrode of capacitor May. 1, 2001
6225216 Method of forming a local interconnect with improved etch selectivity of silicon dioxide/silicide May. 1, 2001
6218271 Method of forming a landing pad on the drain and source of a MOS transistor Apr. 17, 2001
6210979 Method for fabricating ferroelectric capacitor improving adhesive strength between upper electrode and capping layer without polymer in FRAM device Apr. 3, 2001
6211054 Method of forming a conductive line and method of forming a local interconnect Apr. 3, 2001
6211079 Method for fabricating interconnects of a dynamic random access memory (DRAM) Apr. 3, 2001
6211556 Eliminating buried contact trench in MOSFET devices having self-aligned silicide Apr. 3, 2001
6207514 Method for forming borderless gate structures and apparatus formed thereby Mar. 27, 2001
6207515 Method of fabricating buried source to shrink chip size in memory array Mar. 27, 2001
6207539 Semiconductor device having field isolating film of which upper surface is flat and method thereof Mar. 27, 2001
6207543 Metallization technique for gate electrodes and local interconnects Mar. 27, 2001
6207574 Method for fabricating a DRAM cell storage node Mar. 27, 2001
6207575 Local interconnect etch characterization using AFM Mar. 27, 2001
6207997 Thin film transistor for antistatic circuit and method for fabricating the same Mar. 27, 2001
6204121 Method for bottom electrode of capacitor Mar. 20, 2001
6204144 Method for forming a metal capacitor with two metal electrodes Mar. 20, 2001
6200821 Method for fabricating ferroelectric random access memory device Mar. 13, 2001
6200871 High performance self-aligned silicide process for sub-half-micron semiconductor technologies Mar. 13, 2001
6201303 Method of forming a local interconnect with improved etch selectivity of silicon dioxide/silicide Mar. 13, 2001
6201726 Ferroelectric memory device structure useful for preventing hydrogen line degradation Mar. 13, 2001
6197696 Method for forming interconnection structure Mar. 6, 2001
6194313 Method for reducing recess for the formation of local interconnect and or plug trench fill for etchback process Feb. 27, 2001
6190953 Semiconductor device and method for producing same Feb. 20, 2001
6190957 Method of forming a ferroelectric device Feb. 20, 2001
6190962 Method of fabricating capacitor Feb. 20, 2001
6190990 Method for manufacturing the storage node of a capacitor on a semiconductor wafer Feb. 20, 2001
6187626 Forming a semi-recessed capacitor structure in an inter-polysilicon dielectric Feb. 13, 2001
6187689 Manufacture of semiconductor device with fine patterns Feb. 13, 2001
6184073 Process for forming a semiconductor device having an interconnect or conductive film electrically insulated from a conductive member or region Feb. 6, 2001
6184076 DRAM contact process by localized etch-stop removal Feb. 6, 2001
6180449 Depletion compensated polysilicon electrodes Jan. 30, 2001
6180475 Transistor formation with local interconnect overetch immunity Jan. 30, 2001
6180494 Integrated circuitry, methods of fabricating integrated circuitry, methods of forming local interconnects, and methods of forming conductive lines Jan. 30, 2001
6180970 Microelectronic devices including ferroelectric capacitors with lower electrodes extending into contact holes Jan. 30, 2001
6180976 Thin-film capacitors and methods for forming the same Jan. 30, 2001
6177304 Self-aligned contact process using a poly-cap mask Jan. 23, 2001
6177328 Methods of forming capacitors methods of forming DRAM cells, and integrated circuits incorporating structures and DRAM cell structures Jan. 23, 2001
6174735 Method of manufacturing ferroelectric memory device useful for preventing hydrogen line degradation Jan. 16, 2001
6174781 Dual damascene process for capacitance fabrication of DRAM Jan. 16, 2001
6174782 Method of fabricating lower electrode of capacitor Jan. 16, 2001
6174803 Integrated circuit device interconnection techniques Jan. 16, 2001

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