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Class Information
Number: 257/E21.59
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) > Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) > Local interconnects; local pads (epo)
Description: This subclass is indented under subclass E21.582. This subclass is substantially the same in scope as ECLA classification H01L21/768C10.


Patents under this class:

Patent Number Title Of Patent Date Issued
7572650 Suppression of localized metal precipitate formation and corresponding metallization depletion in semiconductor processing Aug. 11, 2009
7550838 Semiconductor device Jun. 23, 2009
7547969 Semiconductor chip with passivation layer comprising metal interconnect and contact pads Jun. 16, 2009
7517785 Electronic interconnects and methods of making same Apr. 14, 2009
7498253 Local interconnection method and structure for use in semiconductor device Mar. 3, 2009
7488678 Method of manufacturing interconnect substrate Feb. 10, 2009
7479688 STI stress modification by nitrogen plasma treatment for improving performance in small width devices Jan. 20, 2009
7479415 Fabrication method of polycrystalline silicon liquid crystal display device Jan. 20, 2009
7459388 Methods of forming dual-damascene interconnect structures using adhesion layers having high internal compressive stresses Dec. 2, 2008
7394028 Flexible circuit substrate for flip-chip-on-flex applications Jul. 1, 2008
7378338 Method of forming an interconnect structure diffusion barrier with high nitrogen content May. 27, 2008
7358188 Method of forming conductive metal silicides by reaction of metal with silicon Apr. 15, 2008
7348270 Techniques for forming interconnects Mar. 25, 2008
7329602 Wiring structure for integrated circuit with reduced intralevel capacitance Feb. 12, 2008
7329563 Method for fabrication of wafer level package incorporating dual compliant layers Feb. 12, 2008
7326610 Process options of forming silicided metal gates for advanced CMOS devices Feb. 5, 2008
7316958 Masks for fabricating semiconductor devices and methods of forming mask patterns Jan. 8, 2008
7271086 Microfeature workpieces and methods of forming a redistribution layer on microfeature workpieces Sep. 18, 2007
7265405 Method for fabricating contacts for integrated circuits, and semiconductor component having such contacts Sep. 4, 2007
7262125 Method of forming low-resistivity tungsten interconnects Aug. 28, 2007
7259083 Local interconnect manufacturing process Aug. 21, 2007
7247562 Semiconductor element, semiconductor device and methods for manufacturing thereof Jul. 24, 2007
7217653 Interconnects forming method and interconnects forming apparatus May. 15, 2007
7208404 Method to reduce Rs pattern dependence effect Apr. 24, 2007
7183188 Method for fabricating contact-making connections Feb. 27, 2007
7176554 Methods for producing a semiconductor entity Feb. 13, 2007
7173338 Suppression of localized metal precipitate formation and corresponding metallization depletion in semiconductor processing Feb. 6, 2007
7160737 Method for fabricating semiconductor device Jan. 9, 2007
7138716 Addition of metal layers with signal reallocation to a microprocessor for increased frequency and lower power Nov. 21, 2006
7119005 Semiconductor local interconnect and contact Oct. 10, 2006
7109068 Through-substrate interconnect fabrication methods Sep. 19, 2006
7094687 Reduced dry etching lag Aug. 22, 2006
7064026 Semiconductor device having shared contact and fabrication method thereof Jun. 20, 2006
7064029 Semiconductor memory device and method of producing the same Jun. 20, 2006
7064395 Semiconductor device and method for fabricating the same Jun. 20, 2006
7061056 High f.sub.MAX deep submicron MOSFET Jun. 13, 2006
7052955 Semiconductor memory device and manufacturing method thereof May. 30, 2006
7052983 Method of manufacturing a semiconductor device having selective epitaxial silicon layer on contact pads May. 30, 2006
7049648 Semiconductor memory device for reducing damage to interlevel dielectric layer and fabrication method thereof May. 23, 2006
7049218 Method of fabricating local interconnection using selective epitaxial growth May. 23, 2006
7037778 Method for fabricating capacitor in semiconductor memory device May. 2, 2006
7037791 Application of single exposure alternating aperture phase shift mask to form sub 0.18 micron polysilicon gates May. 2, 2006
7038281 Semiconductor device and method of manufacturing the same May. 2, 2006
7029963 Semiconductor damascene trench and methods thereof Apr. 18, 2006
7029966 Process options of forming silicided metal gates for advanced CMOS devices Apr. 18, 2006
7026243 Methods of forming conductive material silicides by reaction of metal with silicon Apr. 11, 2006
7015087 Gate-contact structure and method for forming the same Mar. 21, 2006
7015528 Reduced aspect ratio digit line contact process flow used during the formation of a semiconductor device Mar. 21, 2006
7015531 FeRAM having bottom electrode connected to storage node and method for forming the same Mar. 21, 2006
7009257 Methods of manufacturing integrated circuit devices having reduced contact resistance between a substrate and a contact pad while maintaining separation of the substrate and the contact pad an Mar. 7, 2006



 
 
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