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Browse by Category: Main > Physics
Class Information
Number: 257/E21.588
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) > Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) > Filling of holes, grooves, vias or trenches with conductive material (epo) > Reflowing or applying pressure to fill contact hole, e.g., to remove voids (epo)
Description: This subclass is indented under subclass E21.585. This subclass is substantially the same in scope as ECLA classification H01L21/768C4E.










Patents under this class:
1 2 3 4 5

Patent Number Title Of Patent Date Issued
8604529 Apparatus with photodiode region in multiple epitaxial layers Dec. 10, 2013
8513112 Barrier-metal-free copper damascene technology using enhanced reflow Aug. 20, 2013
8497157 Method of manufacturing a semiconductor device and method of manufacturing a semiconductor package including the same Jul. 30, 2013
8304909 IC solder reflow method and materials Nov. 6, 2012
8211792 Barrier-metal-free copper damascene technology using atomic hydrogen enhanced reflow Jul. 3, 2012
8119519 Semiconductor device manufacturing method Feb. 21, 2012
8076197 Image sensor and method for fabricating the same Dec. 13, 2011
8026176 Film forming method, plasma film forming apparatus and storage medium Sep. 27, 2011
7994034 Temperature and pressure control methods to fill features with programmable resistance and switching devices Aug. 9, 2011
7888261 Barrier-metal-free copper damascene technology using atomic hydrogen enhanced reflow Feb. 15, 2011
7859114 IC chip and design structure with through wafer vias dishing correction Dec. 28, 2010
7834459 Semiconductor device and semiconductor device manufacturing method Nov. 16, 2010
7790552 Method for fabricating semiconductor device with bulb-shaped recess gate Sep. 7, 2010
7608535 Method for forming metal contact in semiconductor device Oct. 27, 2009
7575993 Method of manufacturing semiconductor device and display device Aug. 18, 2009
7560380 Chemical dissolution of barrier and adhesion layers Jul. 14, 2009
7510961 Utilization of energy absorbing layer to improve metal flow and fill in a novel interconnect structure Mar. 31, 2009
7485575 Method of manufacturing semiconductor device Feb. 3, 2009
7470580 Fabrication method of a semiconductor device Dec. 30, 2008
7387903 Method for manufacturing layer pattern, method for manufacturing wiring, and method for manufacturing electronic equipment Jun. 17, 2008
7344979 High pressure treatment for improved grain growth and void reduction Mar. 18, 2008
7208839 Semiconductor component assemblies having interconnects Apr. 24, 2007
7192859 Method of manufacturing semiconductor device and display device Mar. 20, 2007
7188411 Process for forming portions of a compound material inside a cavity Mar. 13, 2007
7186643 Barrier-metal-free copper damascene technology using atomic hydrogen enhanced reflow Mar. 6, 2007
7157327 Void free, silicon filled trenches in semiconductors Jan. 2, 2007
7138720 Semiconductor component assemblies having interconnects Nov. 21, 2006
7070659 System for filling openings in semiconductor products Jul. 4, 2006
7060608 System and method for filling openings in semiconductor products Jun. 13, 2006
7049223 Paste including a mixture of powders, connection plug, burying method, and semiconductor device manufacturing method May. 23, 2006
7041586 Semiconductor device having a multilayer interconnection structure May. 9, 2006
6998345 Methods of forming via plugs using an aerosol stream of particles to deposit conductive material Feb. 14, 2006
6974773 High pressure anneals of integrated circuit structures Dec. 13, 2005
6964922 Methods for forming metal interconnections for semiconductor devices having multiple metal depositions Nov. 15, 2005
6955983 Methods of forming metal interconnections of semiconductor devices by treating a barrier metal layer Oct. 18, 2005
6949464 Contact/via force fill techniques Sep. 27, 2005
6946383 Method for forming wiring structure which includes annealing conductive film before and after removal of a portion of the conductive film Sep. 20, 2005
6916735 Method for forming aerial metallic wiring on semiconductor substrate Jul. 12, 2005
6903014 Low temperature reflow method for filling high aspect ratio contacts Jun. 7, 2005
6903008 Method for forming an interconnection in a semiconductor element Jun. 7, 2005
6881673 Integrated deposition process for copper metallization Apr. 19, 2005
6872653 Manufacturing method of semiconductor device Mar. 29, 2005
6864169 Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device Mar. 8, 2005
6855631 Methods of forming via plugs using an aerosol stream of particles to deposit conductive materials Feb. 15, 2005
6849535 Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device Feb. 1, 2005
6846757 Dielectric layer for a semiconductor device and method of producing the same Jan. 25, 2005
6838772 Semiconductor device Jan. 4, 2005
6831002 Manufacturing method of semiconductor device Dec. 14, 2004
6824699 Method of treating an insulting layer Nov. 30, 2004
6815330 Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device Nov. 9, 2004

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