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Class Information
Number: 257/E21.587
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) > Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) > Filling of holes, grooves, vias or trenches with conductive material (epo) > By deposition over sacrificial masking layer, e.g., lift-off (epo)
Description: This subclass is indented under subclass E21.585. This subclass is substantially the same in scope as ECLA classification H01L21/768C4C.

Patents under this class:
1 2 3 4

Patent Number Title Of Patent Date Issued
8580681 Manufacturing method of device Nov. 12, 2013
8575004 Lift-off structure for substrate of a photoelectric device and the method thereof Nov. 5, 2013
8389406 Method of manufacturing semiconductor device Mar. 5, 2013
8389332 Integrated circuit packaging system with isolated pads and method of manufacture thereof Mar. 5, 2013
8349737 Manufacturing method of array substrate using lift-off method Jan. 8, 2013
8334203 Interconnect structure and method of fabricating Dec. 18, 2012
8288271 Method for reworking antireflective coating over semiconductor substrate Oct. 16, 2012
8163583 Manufacturing method of micro electronic mechanical system structure Apr. 24, 2012
8143148 Self-aligned multi-dielectric-layer lift off process for laser diode stripes Mar. 27, 2012
8124523 Fabrication method of a semiconductor device and a semiconductor device Feb. 28, 2012
8119525 Process for selective growth of films during ECP plating Feb. 21, 2012
8053377 Low stress photo-sensitive resin with sponge-like structure and devices manufactured employing same Nov. 8, 2011
7977235 Method for manufacturing a semiconductor device with metal-containing cap layers Jul. 12, 2011
7943504 Self-releasing spring structures and methods May. 17, 2011
7859114 IC chip and design structure with through wafer vias dishing correction Dec. 28, 2010
7803693 Bowed wafer hybridization compensation Sep. 28, 2010
7790605 Formation of interconnects through lift-off processing Sep. 7, 2010
7790601 Forming interconnects with air gaps Sep. 7, 2010
7777323 Semiconductor structure and method for forming the same Aug. 17, 2010
7763544 Method of forming fine pattern of semiconductor device using sige layer as sacrificial layer, and method of forming self-aligned contacts using the same Jul. 27, 2010
7727886 Forming vias using sacrificial material Jun. 1, 2010
7718347 Method for making an improved thin film solar cell interconnect using etch and deposition process May. 18, 2010
7704880 Method of forming contact layers on substrates Apr. 27, 2010
7704765 Method for manufacturing semiconductor device Apr. 27, 2010
7682846 Single and double-gate pseudo-FET devices for semiconductor materials evaluation Mar. 23, 2010
7582557 Process for low resistance metal cap Sep. 1, 2009
7582518 High electron mobility transistor semiconductor device and fabrication method thereof Sep. 1, 2009
7566581 Systems and methods for creating MEMS gyros Jul. 28, 2009
7566659 Method of forming fine pattern of semiconductor device using SiGe layer as sacrificial layer, and method of forming self-aligned contacts using the same Jul. 28, 2009
7470586 Memory cell having bar-shaped storage node contact plugs and methods of fabricating same Dec. 30, 2008
7446034 Process for making a metal seed layer Nov. 4, 2008
7400045 Semiconductor device and method for fabricating the same Jul. 15, 2008
7381638 Fabrication technique using sputter etch and vacuum transfer Jun. 3, 2008
7364928 Electro-optical device and method of manufacturing the same, element driving device and method of manufacturing the same, element substrate, and electronic apparatus Apr. 29, 2008
7329602 Wiring structure for integrated circuit with reduced intralevel capacitance Feb. 12, 2008
7320900 Method of manufacturing liquid crystal display panels Jan. 22, 2008
7309649 Method of forming closed air gap interconnects and structures formed thereby Dec. 18, 2007
7229873 Process for manufacturing dual work function metal gates in a microelectronics device Jun. 12, 2007
7214603 Method for fabricating interconnect structures with reduced plasma damage May. 8, 2007
7071539 Chemical planarization performance for copper/low-k interconnect structures Jul. 4, 2006
7045454 Chemical mechanical planarization of conductive material May. 16, 2006
7000315 Method of making photolithographically-patterned out-of-plane coil structures Feb. 21, 2006
6881670 Interconnect process and method for removing metal silicide Apr. 19, 2005
6856225 Photolithographically-patterned out-of-plane coil structures and method of making Feb. 15, 2005
6803304 Methods for producing electrode and semiconductor device Oct. 12, 2004
6756297 Method of fabricating copper-based semiconductor devices using a sacrificial dielectric layer Jun. 29, 2004
6743716 Structures and methods to enhance copper metallization Jun. 1, 2004
6713875 Barrier layer associated with a conductor layer in damascene structures Mar. 30, 2004
6699396 Methods for electroplating large copper interconnects Mar. 2, 2004
6649510 Method of forming semiconductor memory device using a double layered capping pattern Nov. 18, 2003

1 2 3 4

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