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Class Information
Number: 257/E21.586
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) > Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) > Filling of holes, grooves, vias or trenches with conductive material (epo) > By selective deposition of conductive material in vias, e.g., selective chemical vapor deposition on semiconductor material, plating (epo)
Description: This subclass is indented under subclass E21.585. This subclass is substantially the same in scope as ECLA classification H01L21/768C4B.










Patents under this class:
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Patent Number Title Of Patent Date Issued
6562707 Method of forming a semiconductor device using selective epitaxial growth May. 13, 2003
6552432 Mask on a polymer having an opening width less than that of the opening in the polymer Apr. 22, 2003
6548410 Method of fabricating wires for semiconductor devices Apr. 15, 2003
6541379 Wiring forming method for semiconductor device Apr. 1, 2003
6537905 Fully planarized dual damascene metallization using copper line interconnect and selective CVD aluminum plug Mar. 25, 2003
6537621 Method of forming a titanium film and a barrier film on a surface of a substrate through lamination Mar. 25, 2003
6534116 Plating method and apparatus that creates a differential between additive disposed on a top surface and a cavity surface of a workpiece using an external influence Mar. 18, 2003
6534866 Dual damascene interconnect Mar. 18, 2003
6534395 Method of forming graded thin films using alternating pulses of vapor phase reactants Mar. 18, 2003
6521531 Method for selectively growing a conductive film to fill a contact hole Feb. 18, 2003
6521508 Method of manufacturing a contact plug in a semiconductor device using selective epitaxial growth of silicon process Feb. 18, 2003
6518168 Self-assembled monolayer directed patterning of surfaces Feb. 11, 2003
6515843 Semiconductor capacitive device Feb. 4, 2003
6511912 Method of forming a non-conformal layer over and exposing a trench Jan. 28, 2003
6509239 Method of fabricating a field effect transistor Jan. 21, 2003
6506675 Copper film selective formation method Jan. 14, 2003
6492270 Method for forming copper dual damascene Dec. 10, 2002
6492722 Metallized interconnection structure Dec. 10, 2002
6486559 COPPER WIRING STRUCTURE COMPRISING A COPPER MATERIAL BURIED IN A HOLLOW OF AN INSULATING FILM AND A CARBON LAYER BETWEEN THE HOLLOW AND THE COPPER MATERIAL IN SEMICONDUCTOR DEVICE AND METHOD O Nov. 26, 2002
6486055 Method for forming copper interconnections in semiconductor component using electroless plating system Nov. 26, 2002
6482741 COPPER WIRING STRUCTURE COMPRISING A COPPER MATERIAL BURIED IN A HOLLOW OF AN INSULATING FILM AND A CARBON LAYER BETWEEN THE HOLLOW AND THE COPPER MATERIAL IN SEMICONDUCTOR DEVICE AND METHOD F Nov. 19, 2002
6468895 Pattern forming method Oct. 22, 2002
6468907 Method of manufacturing a copper wiring in a semiconductor device Oct. 22, 2002
6469388 Structure for contact formation using a silicon-germanium alloy Oct. 22, 2002
6458684 Single step process for blanket-selective CVD aluminum deposition Oct. 1, 2002
6458699 Methods of forming a contact to a substrate Oct. 1, 2002
6455412 Semiconductor contact via structure and method Sep. 24, 2002
6451685 Method for multilevel copper interconnects for ultra large scale integration Sep. 17, 2002
6440843 Semiconductor device and method for manufacturing the same Aug. 27, 2002
6436826 Method of forming a metal wiring in a semiconductor device Aug. 20, 2002
6432820 Method of selectively depositing a metal layer in an opening in a dielectric layer by forming a metal-deposition-prevention layer around the opening of the dielectric layer Aug. 13, 2002
6426289 Method of fabricating a barrier layer associated with a conductor layer in damascene structures Jul. 30, 2002
6423629 Multilevel copper interconnects with low-k dielectrics and air gaps Jul. 23, 2002
6420258 Selective growth of copper for advanced metallization Jul. 16, 2002
6420262 Structures and methods to enhance copper metallization Jul. 16, 2002
6417095 Method for fabricating a dual damascene structure Jul. 9, 2002
6416812 Method for depositing copper onto a barrier layer Jul. 9, 2002
6413864 Method of manufacturing a copper metal wiring in a semiconductor device Jul. 2, 2002
6410418 Recess metallization via selective insulator formation on nucleation/seed layer Jun. 25, 2002
RE37749 Electrodeposition apparatus with virtual anode Jun. 18, 2002
6395627 Semiconductor device a burried wiring structure and process for fabricating the same May. 28, 2002
6395615 Selective silicon formation for semiconductor devices May. 28, 2002
6391769 Method for forming metal interconnection in semiconductor device and interconnection structure fabricated thereby May. 21, 2002
6384484 Semiconductor device May. 7, 2002
6380065 Interconnection structure and fabrication process therefor Apr. 30, 2002
6380079 Metal wiring in semiconductor device and method for fabricating the same Apr. 30, 2002
6376355 Method for forming metal interconnection in semiconductor device Apr. 23, 2002
6372598 Method of forming selective metal layer and method of forming capacitor and filling contact hole using the same Apr. 16, 2002
6368484 Selective plating process Apr. 9, 2002
6362073 Method for forming semiconductor device having low parasite capacitance using air gap and self-aligned contact plug Mar. 26, 2002

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