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Class Information
Number: 257/E21.585
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) > Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) > Filling of holes, grooves, vias or trenches with conductive material (epo)
Description: This subclass is indented under subclass E21.582. This subclass is substantially the same in scope as ECLA classification H01L21/768C4.










Sub-classes under this class:

Class Number Class Name Patents
257/E21.587 By deposition over sacrificial masking layer, e.g., lift-off (epo) 162
257/E21.586 By selective deposition of conductive material in vias, e.g., selective chemical vapor deposition on semiconductor material, plating (epo) 641
257/E21.588 Reflowing or applying pressure to fill contact hole, e.g., to remove voids (epo) 236


Patents under this class:

Patent Number Title Of Patent Date Issued
7732325 Plasma-enhanced cyclic layer deposition process for barrier layers Jun. 8, 2010
7732304 Method of manufacturing semiconductor device Jun. 8, 2010
7728429 Semiconductor device having recessed connector portions Jun. 1, 2010
7727896 Stacked die manufacturing process Jun. 1, 2010
7727891 Method of manufacturing a semiconductor device using a wet process Jun. 1, 2010
7727886 Forming vias using sacrificial material Jun. 1, 2010
7723185 Flash memory with recessed floating gate May. 25, 2010
7719032 Electronic device and its manufacturing method May. 18, 2010
7714441 Barrier layer configurations and methods for processing microelectronic topographies having barrier layers May. 11, 2010
7713867 Method for forming a metal line in a semiconductor device May. 11, 2010
7713863 Method for manufacturing a semiconductor device and method for etching the same May. 11, 2010
7705464 Connection structure for semiconductor devices Apr. 27, 2010
7704878 Contact spacer formation using atomic layer deposition Apr. 27, 2010
7701064 Apparatus for improved power distribution in a three dimensional vertical integrated circuit Apr. 20, 2010
7701060 Wiring structure and method for manufacturing the same Apr. 20, 2010
7700484 Method and apparatus for a metallic dry-filling process Apr. 20, 2010
7700474 Barrier deposition using ionized physical vapor deposition (iPVD) Apr. 20, 2010
7700430 Phase-changeable memory device and method of manufacturing the same Apr. 20, 2010
7695994 Material sidewall deposition method Apr. 13, 2010
7692301 Stitched micro-via to enhance adhesion and mechanical strength Apr. 6, 2010
7691683 Electrode structures and method to form electrode structures that minimize electrode work function variation Apr. 6, 2010
7687395 Contact aperture and contact via with stepped sidewall and methods for fabrication thereof Mar. 30, 2010
7687371 Method of forming isolation structure of semiconductor device for preventing excessive loss during recess gate formation Mar. 30, 2010
7682964 Method of forming a contact hole in a semiconductor device Mar. 23, 2010
7678696 Method of making through wafer vias Mar. 16, 2010
7678695 Circuit substrate and method for fabricating the same Mar. 16, 2010
7674710 Method of integrating metal-containing films into semiconductor devices Mar. 9, 2010
7674706 System for modifying small structures using localized charge transfer mechanism to remove or deposit material Mar. 9, 2010
7671445 Versatile system for charge dissipation in the formation of semiconductor device structures Mar. 2, 2010
7671440 Lateral field-effect transistor having an insulated trench gate electrode Mar. 2, 2010
7670950 Copper metallization of through silicon via Mar. 2, 2010
7670943 Enhanced mechanical strength via contacts Mar. 2, 2010
7670915 Contact liner in integrated circuit technology Mar. 2, 2010
7662720 3-Dimensional flash memory device and method of fabricating the same Feb. 16, 2010
7662714 Method for forming metal line of semiconductor device Feb. 16, 2010
7659196 Soluble hard mask for interlayer dielectric patterning Feb. 9, 2010
7655563 Method for preventing the formation of dentrites in a semiconductor Feb. 2, 2010
7655559 Post-CMP treating liquid and manufacturing method of semiconductor device using the same Feb. 2, 2010
7655558 Method and system for determining semiconductor characteristics Feb. 2, 2010
7655547 Metal spacer in single and dual damascene processing Feb. 2, 2010
7652329 Vertical MOS transistor and method therefor Jan. 26, 2010
7651886 Semiconductor device and manufacturing process thereof Jan. 26, 2010
7648904 Metal line in semiconductor device and method for forming the same Jan. 19, 2010
7642182 ESD protection for passive integrated devices Jan. 5, 2010
7642162 Semiconductor device and method of manufacturing the same Jan. 5, 2010
7635648 Methods for fabricating dual material gate in a semiconductor device Dec. 22, 2009
7632736 Self-aligned contact formation utilizing sacrificial polysilicon Dec. 15, 2009
7629264 Structure and method for hybrid tungsten copper metal contact Dec. 8, 2009
7629251 Semiconductor device and a method of manufacturing the same Dec. 8, 2009
7629249 Microfeature workpieces having conductive interconnect structures formed by chemically reactive processes, and associated systems and methods Dec. 8, 2009











 
 
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