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Class Information
Number: 257/E21.585
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) > Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) > Filling of holes, grooves, vias or trenches with conductive material (epo)
Description: This subclass is indented under subclass E21.582. This subclass is substantially the same in scope as ECLA classification H01L21/768C4.










Sub-classes under this class:

Class Number Class Name Patents
257/E21.587 By deposition over sacrificial masking layer, e.g., lift-off (epo) 162
257/E21.586 By selective deposition of conductive material in vias, e.g., selective chemical vapor deposition on semiconductor material, plating (epo) 641
257/E21.588 Reflowing or applying pressure to fill contact hole, e.g., to remove voids (epo) 236


Patents under this class:
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Patent Number Title Of Patent Date Issued
7473597 Method of forming via structures and method of fabricating phase change memory devices incorporating such via structures Jan. 6, 2009
7470580 Fabrication method of a semiconductor device Dec. 30, 2008
7465652 Method of forming a catalyst layer on the barrier layer of a conductive interconnect of a semiconductor device Dec. 16, 2008
7462559 Systems and methods for forming metal-containing layers using vapor deposition processes Dec. 9, 2008
7452805 Aluminum based conductor for via fill and interconnect Nov. 18, 2008
7452804 Single damascene with disposable stencil and method therefore Nov. 18, 2008
7452801 Metal interconnection structure of a semiconductor device having low resistance and method of fabricating the same Nov. 18, 2008
7446039 Integrated circuit system with dummy region Nov. 4, 2008
7446036 Gap free anchored conductor and dielectric structure and method for fabrication thereof Nov. 4, 2008
7439579 Power semiconductor with functional element guide structure Oct. 21, 2008
7439132 Semiconductor device comprising capacitor and method of fabricating the same Oct. 21, 2008
7436040 Method and apparatus for diverting void diffusion in integrated circuit conductors Oct. 14, 2008
7436009 Via structures and trench structures and dual damascene structures Oct. 14, 2008
7432192 Post ECP multi-step anneal/H.sub.2 treatment to reduce film impurity Oct. 7, 2008
7432125 CMOS image sensor and manufacturing method thereof Oct. 7, 2008
7419863 Fabrication of semiconductor structure in which complementary field-effect transistors each have hypoabrupt body dopant distribution below at least one source/drain zone Sep. 2, 2008
7416986 Test structure and method for detecting via contact shorting in shallow trench isolation regions Aug. 26, 2008
7416982 Semiconductor devices and methods for manufacturing the same Aug. 26, 2008
7413978 Substrate, electro-optical device, electronic apparatus, method of forming substrate, method of forming electro-optical device, and method of forming electronic apparatus Aug. 19, 2008
7410898 Methods of fabricating interconnects for semiconductor components Aug. 12, 2008
7410881 Method of manufacturing flash memory device Aug. 12, 2008
7407886 Method for preparing a contact plug structure Aug. 5, 2008
7405461 Semiconductor device and method for manufacturing semiconductor device Jul. 29, 2008
7405158 Methods for depositing tungsten layers employing atomic layer deposition techniques Jul. 29, 2008
7400045 Semiconductor device and method for fabricating the same Jul. 15, 2008
7399706 Manufacturing method of semiconductor device Jul. 15, 2008
7396755 Process and integration scheme for a high sidewall coverage ultra-thin metal seed layer Jul. 8, 2008
7396751 Method for manufacturing semiconductor device Jul. 8, 2008
7393766 Process for integration of a high dielectric constant gate insulator layer in a CMOS device Jul. 1, 2008
7385275 Shallow trench isolation method for shielding trapped charge in a semiconductor device Jun. 10, 2008
7381638 Fabrication technique using sputter etch and vacuum transfer Jun. 3, 2008
7378341 Automatic process control of after-etch-inspection critical dimension May. 27, 2008
7365009 Structure of metal interconnect and fabrication method thereof Apr. 29, 2008
7365005 Method for filling of a recessed structure of a semiconductor device Apr. 29, 2008
7358187 Coating process for patterned substrate surfaces Apr. 15, 2008
7358180 Method of forming wiring structure and semiconductor device Apr. 15, 2008
7358172 Poly filled substrate contact on SOI structure Apr. 15, 2008
7354855 Semiconductor device and a method of manufacturing the same Apr. 8, 2008
7348648 Interconnect structure with a barrier-redundancy feature Mar. 25, 2008
7344975 Method to reduce charge buildup during high aspect ratio contact etch Mar. 18, 2008
7341947 Methods of forming metal-containing films over surfaces of semiconductor substrates Mar. 11, 2008
7341908 Semiconductor device and method of manufacturing the same Mar. 11, 2008
7335589 Method of forming contact via through multiple layers of dielectric material Feb. 26, 2008
7327009 Selective nitride liner formation for shallow trench isolation Feb. 5, 2008
7314828 Repairing method for low-k dielectric materials Jan. 1, 2008
7312162 Low temperature plasma deposition process for carbon layer deposition Dec. 25, 2007
7300879 Methods of fabricating metal wiring in semiconductor devices Nov. 27, 2007
7300873 Systems and methods for forming metal-containing layers using vapor deposition processes Nov. 27, 2007
7300867 Dual damascene interconnect structures having different materials for line and via conductors Nov. 27, 2007
7297634 Method and apparatus for semiconductor device and semiconductor memory device Nov. 20, 2007

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