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Class Information
Number: 257/E21.585
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) > Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) > Filling of holes, grooves, vias or trenches with conductive material (epo)
Description: This subclass is indented under subclass E21.582. This subclass is substantially the same in scope as ECLA classification H01L21/768C4.










Sub-classes under this class:

Class Number Class Name Patents
257/E21.587 By deposition over sacrificial masking layer, e.g., lift-off (epo) 162
257/E21.586 By selective deposition of conductive material in vias, e.g., selective chemical vapor deposition on semiconductor material, plating (epo) 641
257/E21.588 Reflowing or applying pressure to fill contact hole, e.g., to remove voids (epo) 236


Patents under this class:

Patent Number Title Of Patent Date Issued
8704375 Barrier structures and methods for through substrate vias Apr. 22, 2014
8703609 Through-substrate via for semiconductor device Apr. 22, 2014
8692382 Chip package Apr. 8, 2014
8691690 Contact formation method incorporating preventative etch step reducing interlayer dielectric material flake defects Apr. 8, 2014
8691597 Method for manufacturing a semiconductor device including application of a plating voltage Apr. 8, 2014
8685851 MOS device with memory function and manufacturing method thereof Apr. 1, 2014
8679911 Cross-coupling-based design using diffusion contact structures Mar. 25, 2014
8674515 3D integrated circuits structure Mar. 18, 2014
8674476 Anti-fuse device structure and electroplating circuit structure and method Mar. 18, 2014
8673778 Tungsten film forming method Mar. 18, 2014
8673775 Methods of forming semiconductor structures Mar. 18, 2014
8664691 Silicon photomultiplier with trench isolation Mar. 4, 2014
8664114 Image sensor and method for fabricating the same Mar. 4, 2014
8653663 Barrier layer for copper interconnect Feb. 18, 2014
8652966 Semiconductor device manufacturing method and semiconductor device Feb. 18, 2014
8652872 Solar cells and method of manufacturing thereof Feb. 18, 2014
8647980 Method of forming wiring and method of manufacturing semiconductor substrates Feb. 11, 2014
8647977 Methods of forming interconnects Feb. 11, 2014
8642460 Semiconductor switching device and method of making the same Feb. 4, 2014
8642456 Implementing semiconductor signal-capable capacitors with deep trench and TSV technologies Feb. 4, 2014
8637962 Semiconductor dice including at least one blind hole, wafers including such semiconductor dice, and intermediate products made while forming at least one blind hole in a substrate Jan. 28, 2014
8637912 Vertical gate device with reduced word line resistivity Jan. 28, 2014
8637395 Methods for photo-patternable low-k (PPLK) integration with curing after pattern transfer Jan. 28, 2014
8637378 Semiconductor component and methods for producing a semiconductor component Jan. 28, 2014
8629437 Semiconductor device and manufacturing method thereof Jan. 14, 2014
8629061 Method for three-dimensional packaging of electronic devices Jan. 14, 2014
8629057 Semiconductor substrates with unitary vias and via terminals, and associated systems and methods Jan. 14, 2014
8629019 Method of forming self aligned contacts for a power MOSFET Jan. 14, 2014
8624396 Apparatus and method for low contact resistance carbon nanotube interconnect Jan. 7, 2014
8623727 Method for fabricating semiconductor device with buried gate Jan. 7, 2014
8610283 Semiconductor device having a copper plug Dec. 17, 2013
8598713 Deep silicon via for grounding of circuits and devices, emitter ballasting and isolation Dec. 3, 2013
8598677 Semiconductor device including metal lines Dec. 3, 2013
8598030 Process for making conductive post with footing profile Dec. 3, 2013
8586996 Semiconductor device and method of manufacturing the same Nov. 19, 2013
8586471 Seed layers for metallic interconnects and products Nov. 19, 2013
8586448 Method and apparatus for forming silicon film Nov. 19, 2013
8586133 Method for strengthening adhesion between dielectric layers formed adjacent to metal layers Nov. 19, 2013
8580675 Two-track cross-connect in double-patterned structure using rectangular via Nov. 12, 2013
8563432 Method for forming through silicon via structure Oct. 22, 2013
8563416 Coaxial solder bump support structure Oct. 22, 2013
8557701 Method for fabricating a semiconductor device with formation of conductive lines Oct. 15, 2013
8557664 Methods of fabricating semiconductor devices Oct. 15, 2013
8551874 MOSFET gate and source/drain contact metallization Oct. 8, 2013
8530309 Memory device and method for fabricating the same Sep. 10, 2013
8525345 Chip package and method for forming the same Sep. 3, 2013
8519461 Device with post-contact back end of line through-hole via integration Aug. 27, 2013
8517769 Methods of forming copper-based conductive structures on an integrated circuit device Aug. 27, 2013
8513808 Semiconductor device having trench-isolated element formation region Aug. 20, 2013
8513750 Forming inductor and transformer structures with magnetic materials using damascene processing for integrated circuits Aug. 20, 2013











 
 
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