| |
 |
|
Class Information
Number: 257/E21.579
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) > Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) > By forming via holes (epo) > For "dual damascene" type structures (epo)
Description: This subclass is indented under subclass E21.577. This subclass is substantially the same in scope as ECLA classification H01L21/768B2D.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6841467 |
Method for producing semiconductor device |
Jan. 11, 2005 |
| 6841471 |
Fabrication method of semiconductor device |
Jan. 11, 2005 |
| 6841477 |
Metal interconnection, semiconductor device, method for forming metal interconnection and method for fabricating semiconductor device |
Jan. 11, 2005 |
| 6841481 |
Etching process for a two-layer metallization |
Jan. 11, 2005 |
| 6841844 |
Air gaps copper interconnect structure |
Jan. 11, 2005 |
| 6838393 |
Method for producing semiconductor including forming a layer containing at least silicon carbide and forming a second layer containing at least silicon oxygen carbide |
Jan. 4, 2005 |
| 6838769 |
Dual damascene bond pad structure for lowering stress and allowing circuitry under pads |
Jan. 4, 2005 |
| 6835292 |
Electrochemical thin film polishing method and polishing apparatus |
Dec. 28, 2004 |
| 6836017 |
Protection of low-k ILD during damascene processing with thin liner |
Dec. 28, 2004 |
| 6833233 |
Deep UV-resistant photoresist plug for via hole |
Dec. 21, 2004 |
| 6833318 |
Gap-filling process |
Dec. 21, 2004 |
| 6833320 |
Removing sacrificial material by thermal decomposition |
Dec. 21, 2004 |
| 6833321 |
Method of making a semiconductor device that has copper damascene interconnects with enhanced electromigration reliability |
Dec. 21, 2004 |
| 6833325 |
Method for plasma etching performance enhancement |
Dec. 21, 2004 |
| 6831013 |
Method of forming a dual damascene via by using a metal hard mask layer |
Dec. 14, 2004 |
| 6831366 |
Interconnects containing first and second porous low-k dielectrics separated by a porous buried etch stop layer |
Dec. 14, 2004 |
| 6828222 |
Method for manufacturing multilayer wiring structure semiconductor device |
Dec. 7, 2004 |
| 6828229 |
Method of manufacturing interconnection line in semiconductor device |
Dec. 7, 2004 |
| 6828245 |
Method of improving an etching profile in dual damascene etching |
Dec. 7, 2004 |
| 6828247 |
Method for etching organic film, method for fabricating semiconductor device and pattern formation method |
Dec. 7, 2004 |
| 6825121 |
Method of manufacturing a capacitor of a semiconductor device |
Nov. 30, 2004 |
| 6825124 |
Method of forming metal line in semiconductor device |
Nov. 30, 2004 |
| 6825562 |
Damascene structure fabricated using a layer of silicon-based photoresist material |
Nov. 30, 2004 |
| 6821687 |
Photo mask for fabricating semiconductor device having dual damascene structure |
Nov. 23, 2004 |
| 6821880 |
Process of dual or single damascene utilizing separate etching and DCM apparati |
Nov. 23, 2004 |
| 6821889 |
Production of elemental thin films using a boron-containing reducing agent |
Nov. 23, 2004 |
| 6821891 |
Atomic layer deposition of copper using a reducing gas and non-fluorinated copper precursors |
Nov. 23, 2004 |
| 6821905 |
Method for avoiding carbon and nitrogen contamination of a dielectric insulating layer |
Nov. 23, 2004 |
| 6822202 |
Semiconductor processing temperature control |
Nov. 23, 2004 |
| 6822282 |
Analog capacitor in dual damascene process |
Nov. 23, 2004 |
| 6818547 |
Dual damascene process |
Nov. 16, 2004 |
| 6818552 |
Method for eliminating reaction between photoresist and OSG |
Nov. 16, 2004 |
| 6818995 |
Semiconductor device and method of manufacturing the same |
Nov. 16, 2004 |
| 6818997 |
Semiconductor constructions |
Nov. 16, 2004 |
| 6815148 |
Method of manufacturing a semiconductor device and designing a mask pattern |
Nov. 9, 2004 |
| 6815329 |
Multilayer interconnect structure containing air gaps and method for making |
Nov. 9, 2004 |
| 6815331 |
Method for forming metal wiring layer of semiconductor device |
Nov. 9, 2004 |
| 6815332 |
Method for forming integrated dielectric layers |
Nov. 9, 2004 |
| 6815333 |
Tri-layer masking architecture for patterning dual damascene interconnects |
Nov. 9, 2004 |
| 6815820 |
Method for forming a semiconductor interconnect with multiple thickness |
Nov. 9, 2004 |
| 6812043 |
Method for forming a carbon doped oxide low-k insulating layer |
Nov. 2, 2004 |
| 6812127 |
Method of forming semiconductor device including silicon oxide with fluorine, embedded wiring layer, via holes, and wiring grooves |
Nov. 2, 2004 |
| 6812130 |
Self-aligned dual damascene etch using a polymer |
Nov. 2, 2004 |
| 6812131 |
Use of sacrificial inorganic dielectrics for dual damascene processes utilizing organic intermetal dielectrics |
Nov. 2, 2004 |
| 6812132 |
Filling small dimension vias using supercritical carbon dioxide |
Nov. 2, 2004 |
| 6812133 |
Fabrication method of semiconductor device |
Nov. 2, 2004 |
| 6812145 |
Method of reducing plasma charging damage during dielectric etch process for dual damascene interconnect structures |
Nov. 2, 2004 |
| 6809028 |
Chemistry for liner removal in a dual damascene process |
Oct. 26, 2004 |
| 6809037 |
MANUFACTURING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING SIMULTANEOUS FORMATION OF VIA-HOLE REACHING METAL WIRING AND CONCAVE GROOVE IN INTERLAYER FILM AND SEMICONDUCTOR INTEGRATED C |
Oct. 26, 2004 |
| 6805138 |
Semiconductor device production method and semiconductor device production apparatus |
Oct. 19, 2004 |
|
|
|
