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Class Information
Number: 257/E21.579
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) > Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) > By forming via holes (epo) > For "dual damascene" type structures (epo)
Description: This subclass is indented under subclass E21.577. This subclass is substantially the same in scope as ECLA classification H01L21/768B2D.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7351635 |
Method of fabricating microelectronic device using super critical fluid |
Apr. 1, 2008 |
| 7348281 |
Method of filling structures for forming via-first dual damascene interconnects |
Mar. 25, 2008 |
| 7344972 |
Photosensitive dielectric layer |
Mar. 18, 2008 |
| 7338895 |
Method for dual damascene integration of ultra low dielectric constant porous materials |
Mar. 4, 2008 |
| 7335991 |
Pattern forming structure, pattern forming method, device, electro-optical device, and electronic apparatus |
Feb. 26, 2008 |
| 7335588 |
Interconnect structure and method of fabrication of same |
Feb. 26, 2008 |
| 7329955 |
Metal-insulator-metal (MIM) capacitor |
Feb. 12, 2008 |
| 7329602 |
Wiring structure for integrated circuit with reduced intralevel capacitance |
Feb. 12, 2008 |
| 7323407 |
Method of fabricating dual damascene interconnections of microelectronic device using diffusion barrier layer against base material |
Jan. 29, 2008 |
| 7319071 |
Methods for forming a metallic damascene structure |
Jan. 15, 2008 |
| 7315082 |
Semiconductor device having integrated circuit contact |
Jan. 1, 2008 |
| 7314823 |
Chemical mechanical polishing composition and process |
Jan. 1, 2008 |
| 7312146 |
Semiconductor device interconnect fabricating techniques |
Dec. 25, 2007 |
| 7309649 |
Method of forming closed air gap interconnects and structures formed thereby |
Dec. 18, 2007 |
| 7307016 |
Method of processing metal surface in dual damascene manufacturing |
Dec. 11, 2007 |
| 7307015 |
Method for forming an interconnection line in a semiconductor device |
Dec. 11, 2007 |
| 7307014 |
Method of forming a via contact structure using a dual damascene process |
Dec. 11, 2007 |
| 7300867 |
Dual damascene interconnect structures having different materials for line and via conductors |
Nov. 27, 2007 |
| 7300825 |
Customizing back end of the line interconnects |
Nov. 27, 2007 |
| 7285490 |
Method for the producing an integrated circuit bar arrangement, in particular comprising a capacitor assembly, in addition to an integrated circuit arrangement |
Oct. 23, 2007 |
| 7285489 |
Dual damascene process for forming a multi-layer low-k dielectric interconnect |
Oct. 23, 2007 |
| 7274104 |
Semiconductor device having an interconnect that increases in impurity concentration as width increases |
Sep. 25, 2007 |
| 7265450 |
Semiconductor device and method for fabricating the same |
Sep. 4, 2007 |
| 7262133 |
Enhancement of copper line reliability using thin ALD tan film to cap the copper line |
Aug. 28, 2007 |
| 7259089 |
Semiconductor device manufacturing method that includes forming a wiring pattern with a mask layer that has a tapered shape |
Aug. 21, 2007 |
| 7253524 |
Copper interconnects |
Aug. 7, 2007 |
| 7253097 |
Integrated circuit system using dual damascene process |
Aug. 7, 2007 |
| 7247939 |
Metal filled semiconductor features with improved structural stability |
Jul. 24, 2007 |
| 7247560 |
Selective deposition of double damascene metal |
Jul. 24, 2007 |
| 7232746 |
Method for forming dual damascene interconnection in semiconductor device |
Jun. 19, 2007 |
| 7229915 |
Method for manufacturing semiconductor device |
Jun. 12, 2007 |
| 7227265 |
Electroplated copper interconnection structure, process for making and electroplating bath |
Jun. 5, 2007 |
| 7223680 |
Method of forming a dual damascene metal trace with reduced RF impedance resulting from the skin effect |
May. 29, 2007 |
| 7217654 |
Semiconductor device and method of manufacturing the same |
May. 15, 2007 |
| 7217653 |
Interconnects forming method and interconnects forming apparatus |
May. 15, 2007 |
| 7214612 |
Dual damascene structure and fabrication thereof |
May. 8, 2007 |
| 7214609 |
Methods for forming single damascene via or trench cavities and for forming dual damascene via cavities |
May. 8, 2007 |
| 7214603 |
Method for fabricating interconnect structures with reduced plasma damage |
May. 8, 2007 |
| 7211519 |
Method for manufacturing semiconductor device |
May. 1, 2007 |
| 7208418 |
Sealing sidewall pores in low-k dielectrics |
Apr. 24, 2007 |
| 7205249 |
CVD plasma assisted low dielectric constant films |
Apr. 17, 2007 |
| 7205225 |
Method of manufacturing a semiconductor device and semiconductor device obtained by using such a method |
Apr. 17, 2007 |
| 7192877 |
Low-K dielectric etch process for dual-damascene structures |
Mar. 20, 2007 |
| 7192863 |
Method of eliminating etch ridges in a dual damascene process |
Mar. 20, 2007 |
| 7189650 |
Method and apparatus for copper film quality enhancement with two-step deposition |
Mar. 13, 2007 |
| 7189643 |
Semiconductor device and method of fabricating the same |
Mar. 13, 2007 |
| 7189628 |
Fabrication of trenches with multiple depths on the same substrate |
Mar. 13, 2007 |
| 7183202 |
Method of forming metal wiring in a semiconductor device |
Feb. 27, 2007 |
| 7183195 |
Method of fabricating dual damascene interconnections of microelectronic device using hybrid low k-dielectric and carbon-free inorganic filler |
Feb. 27, 2007 |
| 7179732 |
Interconnection structure and fabrication method thereof |
Feb. 20, 2007 |
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