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Class Information
Number: 257/E21.579
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) > Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) > By forming via holes (epo) > For "dual damascene" type structures (epo)
Description: This subclass is indented under subclass E21.577. This subclass is substantially the same in scope as ECLA classification H01L21/768B2D.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6489233 |
Non-metallic barrier formations for copper damascene type interconnects |
Dec. 3, 2002 |
| 6489647 |
Capacitor for high performance system-on-chip using post passivation process structure |
Dec. 3, 2002 |
| 6486036 |
Method and apparatus for process control of alignment in dual damascene processes |
Nov. 26, 2002 |
| 6486059 |
Dual damascene process using an oxide liner for a dielectric barrier layer |
Nov. 26, 2002 |
| 6482262 |
Deposition of transition metal carbides |
Nov. 19, 2002 |
| 6482554 |
Method for manufacturing a semiconductor device, photolithography mask and method for manufacturing the same |
Nov. 19, 2002 |
| 6482656 |
Method of electrochemical formation of high Tc superconducting damascene interconnect for integrated circuit |
Nov. 19, 2002 |
| 6482733 |
Protective layers prior to alternating layer deposition |
Nov. 19, 2002 |
| 6483173 |
Solution to black diamond film delamination problem |
Nov. 19, 2002 |
| 6479380 |
Semiconductor device and manufacturing method thereof |
Nov. 12, 2002 |
| 6479391 |
Method for making a dual damascene interconnect using a multilayer hard mask |
Nov. 12, 2002 |
| 6479884 |
Interim oxidation of silsesquioxane dielectric for dual damascene process |
Nov. 12, 2002 |
| 6475276 |
Production of elemental thin films using a boron-containing reducing agent |
Nov. 5, 2002 |
| 6475810 |
Method of manufacturing embedded organic stop layer for dual damascene patterning |
Nov. 5, 2002 |
| 6475904 |
Interconnect structure with silicon containing alicyclic polymers and low-k dielectric materials and method of making same with single and dual damascene techniques |
Nov. 5, 2002 |
| 6475905 |
Optimization of organic bottom anti-reflective coating (BARC) thickness for dual damascene process |
Nov. 5, 2002 |
| 6475921 |
Mask for producing rectangular openings in a substrate |
Nov. 5, 2002 |
| 6475929 |
Method of manufacturing a semiconductor structure with treatment to sacrificial stop layer producing diffusion to an adjacent low-k dielectric layer lowering the constant |
Nov. 5, 2002 |
| 6472231 |
Dielectric layer with treated top surface forming an etch stop layer and method of making the same |
Oct. 29, 2002 |
| 6472306 |
Method of forming a dual damascene opening using CVD Low-K material and spin-on-polymer |
Oct. 29, 2002 |
| 6472333 |
Silicon carbide cap layers for low dielectric constant silicon oxide layers |
Oct. 29, 2002 |
| 6468898 |
Method of manufacturing semiconductor device |
Oct. 22, 2002 |
| 6469775 |
Reticle for creating resist-filled vias in a dual damascene process |
Oct. 22, 2002 |
| 6465157 |
Dual layer pattern formation method for dual damascene interconnect |
Oct. 15, 2002 |
| 6465294 |
Self-aligned process for a stacked gate RF MOSFET device |
Oct. 15, 2002 |
| 6465340 |
Via filled dual damascene structure with middle stop layer and method for making the same |
Oct. 15, 2002 |
| 6465341 |
Manufacturing method for semiconductor interconnect barrier of boron silicon nitride |
Oct. 15, 2002 |
| 6465342 |
Semiconductor device and its manufacturing method |
Oct. 15, 2002 |
| 6465358 |
Post etch clean sequence for making a semiconductor device |
Oct. 15, 2002 |
| 6465366 |
Dual frequency plasma enhanced chemical vapor deposition of silicon carbide layers |
Oct. 15, 2002 |
| 6465888 |
Composite silicon-metal nitride barrier to prevent formation of metal fluorides in copper damascene |
Oct. 15, 2002 |
| 6465889 |
Silicon carbide barc in dual damascene processing |
Oct. 15, 2002 |
| 6461230 |
Chemical-mechanical polishing method |
Oct. 8, 2002 |
| 6461717 |
Aperture fill |
Oct. 8, 2002 |
| 6461955 |
Yield improvement of dual damascene fabrication through oxide filling |
Oct. 8, 2002 |
| 6461963 |
Utilization of disappearing silicon hard mask for fabrication of semiconductor structures |
Oct. 8, 2002 |
| 6458691 |
Dual inlaid process using an imaging layer to protect via from poisoning |
Oct. 1, 2002 |
| 6458705 |
Method for forming via-first dual damascene interconnect structure |
Oct. 1, 2002 |
| 6459155 |
Damascene processing employing low Si-SiON etch stop layer/arc |
Oct. 1, 2002 |
| 6459562 |
High density metal insulator metal capacitors |
Oct. 1, 2002 |
| 6455409 |
Damascene processing using a silicon carbide hard mask |
Sep. 24, 2002 |
| 6455411 |
Defect and etch rate control in trench etch for dual damascene patterning of low-k dielectrics |
Sep. 24, 2002 |
| 6455416 |
Developer soluble dyed BARC for dual damascene process |
Sep. 24, 2002 |
| 6455417 |
Method for forming damascene structure employing bi-layer carbon doped silicon nitride/carbon doped silicon oxide etch stop layer |
Sep. 24, 2002 |
| 6455435 |
Method for fabricating a wiring plane on a semiconductor chip with an antifuse |
Sep. 24, 2002 |
| 6455439 |
Method of forming a mask |
Sep. 24, 2002 |
| 6455444 |
Semiconductor device having a multilayer interconnection structure |
Sep. 24, 2002 |
| 6455885 |
Inductor structure for high performance system-on-chip using post passivation process |
Sep. 24, 2002 |
| 6451181 |
Method of forming a semiconductor device barrier layer |
Sep. 17, 2002 |
| 6451620 |
Method for etching organic film, method for fabricating semiconductor device and pattern formation method |
Sep. 17, 2002 |
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