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Class Information
Number: 257/E21.579
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) > Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) > By forming via holes (epo) > For "dual damascene" type structures (epo)
Description: This subclass is indented under subclass E21.577. This subclass is substantially the same in scope as ECLA classification H01L21/768B2D.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 6635583 |
Silicon carbide deposition for use as a low-dielectric constant anti-reflective coating |
Oct. 21, 2003 |
| 6632707 |
Method for forming an interconnect structure using a CVD organic BARC to mitigate via poisoning |
Oct. 14, 2003 |
| 6632738 |
Method of manufacturing semiconductor device |
Oct. 14, 2003 |
| 6632746 |
Etching method, semiconductor and fabricating method for the same |
Oct. 14, 2003 |
| 6633076 |
Methods and apparatus for producing stable low k FSG film for HDP-CVD |
Oct. 14, 2003 |
| 6630380 |
Method for making three-dimensional metal-insulator-metal capacitors for dynamic random access memory (DRAM) and ferroelectric random access memory (FERAM) |
Oct. 7, 2003 |
| 6630396 |
Use of a silicon carbide adhesion promoter layer to enhance the adhesion of silicon nitride to low-k fluorinated amorphous carbon |
Oct. 7, 2003 |
| 6630397 |
Method to improve surface uniformity of a layer of arc used for the creation of contact plugs |
Oct. 7, 2003 |
| 6630407 |
Plasma etching of organic antireflective coating |
Oct. 7, 2003 |
| 6630705 |
Semiconductor device with capacitor electrodes |
Oct. 7, 2003 |
| 6627532 |
Method of decreasing the K value in SiOC layer deposited by chemical vapor deposition |
Sep. 30, 2003 |
| 6627535 |
Methods and apparatus for forming a film on a substrate |
Sep. 30, 2003 |
| 6627539 |
Method of forming dual-damascene interconnect structures employing low-k dielectric materials |
Sep. 30, 2003 |
| 6627540 |
Method for forming dual damascene structure in semiconductor device |
Sep. 30, 2003 |
| 6627557 |
Semiconductor device and method for manufacturing the same |
Sep. 30, 2003 |
| 6624040 |
Self-integrated vertical MIM capacitor in the dual damascene process |
Sep. 23, 2003 |
| 6624053 |
Damascene-type interconnection structure and its production process |
Sep. 23, 2003 |
| 6624066 |
Reliable interconnects with low via/contact resistance |
Sep. 23, 2003 |
| 6624085 |
Semiconductor structure, capacitor, mask and methods of manufacture thereof |
Sep. 23, 2003 |
| 6624514 |
Semiconductor device and manufacturing method thereof |
Sep. 23, 2003 |
| 6620526 |
Method of making a dual damascene when misalignment occurs |
Sep. 16, 2003 |
| 6620560 |
Plasma treatment of low-k dielectric films to improve patterning |
Sep. 16, 2003 |
| 6620727 |
Aluminum hardmask for dielectric etch |
Sep. 16, 2003 |
| 6620728 |
Top layers of metal for high performance IC's |
Sep. 16, 2003 |
| 6620729 |
Ion beam dual damascene process |
Sep. 16, 2003 |
| 6620745 |
Method for forming a blocking layer |
Sep. 16, 2003 |
| 6616855 |
Process to reduce surface roughness of low K damascene |
Sep. 9, 2003 |
| 6617208 |
High capacitance damascene capacitors |
Sep. 9, 2003 |
| 6617232 |
Method of forming wiring using a dual damascene process |
Sep. 9, 2003 |
| 6617244 |
Etching method |
Sep. 9, 2003 |
| 6617257 |
Method of plasma etching organic antireflective coating |
Sep. 9, 2003 |
| 6613666 |
Method of reducing plasma charging damage during dielectric etch process for dual damascene interconnect structures |
Sep. 2, 2003 |
| 6614096 |
Method for manufacturing a semiconductor device and a semiconductor device |
Sep. 2, 2003 |
| 6609950 |
Method for polishing a substrate |
Aug. 26, 2003 |
| 6610594 |
Locally increasing sidewall density by ion implantation |
Aug. 26, 2003 |
| 6607992 |
Antireflection coating and semiconductor device manufacturing method |
Aug. 19, 2003 |
| 6605528 |
Post passivation metal scheme for high-performance integrated circuit devices |
Aug. 12, 2003 |
| 6605536 |
Treatment of low-k dielectric films to enable patterning of deep submicron features |
Aug. 12, 2003 |
| 6605540 |
Process for forming a dual damascene structure |
Aug. 12, 2003 |
| 6605542 |
Manufacturing method of semiconductor devices by using dry etching technology |
Aug. 12, 2003 |
| 6605545 |
Method for forming hybrid low-K film stack to avoid thermal stress effect |
Aug. 12, 2003 |
| 6605546 |
Dual bake for BARC fill without voids |
Aug. 12, 2003 |
| 6605855 |
CVD plasma process to fill contact hole in damascene process |
Aug. 12, 2003 |
| 6605863 |
Low k film application for interlevel dielectric and method of cleaning etched features |
Aug. 12, 2003 |
| 6605874 |
Method of making semiconductor device using an interconnect |
Aug. 12, 2003 |
| 6602779 |
Method for forming low dielectric constant damascene structure while employing carbon doped silicon oxide planarizing stop layer |
Aug. 5, 2003 |
| 6602802 |
Method of forming a porous film on a substrate |
Aug. 5, 2003 |
| 6603204 |
Low-k interconnect structure comprised of a multilayer of spin-on porous dielectrics |
Aug. 5, 2003 |
| 6603206 |
Slot via filled dual damascene interconnect structure without middle etch stop layer |
Aug. 5, 2003 |
| 6599829 |
Method for photoresist strip, sidewall polymer removal and passivation for aluminum metallization |
Jul. 29, 2003 |
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