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Class Information
Number: 257/E21.579
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) > Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) > By forming via holes (epo) > For "dual damascene" type structures (epo)
Description: This subclass is indented under subclass E21.577. This subclass is substantially the same in scope as ECLA classification H01L21/768B2D.










Patents under this class:

Patent Number Title Of Patent Date Issued
8709942 Methods for fabricating semiconductor devices Apr. 29, 2014
8703605 High yield and high throughput method for the manufacture of integrated circuit devices of improved integrity, performance and reliability Apr. 22, 2014
8674382 Semiconductor light emitting device comprising heterojunction Mar. 18, 2014
8673770 Methods of forming conductive structures in dielectric layers on an integrated circuit device Mar. 18, 2014
8647991 Method for forming dual damascene opening Feb. 11, 2014
8642472 Method for manufacturing a semiconductor device Feb. 4, 2014
8642467 Semiconductor device having silicon-diffused metal wiring layer and its manufacturing method Feb. 4, 2014
8586469 Metal layer end-cut flow Nov. 19, 2013
8580665 MOSFET integrated circuit having doped conductive interconnects and methods for its manufacture Nov. 12, 2013
8558384 Interconnect structure containing various capping materials for electrical fuse and other related applications Oct. 15, 2013
8552559 Very thick metal interconnection scheme in IC chips Oct. 8, 2013
8513815 Implementing integrated circuit mixed double density and high performance wire structure Aug. 20, 2013
8513114 Method for forming a dual damascene interconnect structure Aug. 20, 2013
8481423 Methods to mitigate plasma damage in organosilicate dielectrics Jul. 9, 2013
8476160 Sublithographic patterning employing image transfer of a controllably damaged dielectric sidewall Jul. 2, 2013
8470706 Methods to mitigate plasma damage in organosilicate dielectrics Jun. 25, 2013
8466554 Electronic device having interconnections, openings, and pads having greater width than the openings Jun. 18, 2013
8461012 Device with ground plane for high frequency signal transmission and method therefor Jun. 11, 2013
8450854 Interconnect structures with patternable low-k dielectrics and method of fabricating same May. 28, 2013
8436454 Reprogrammable circuit board with alignment-insensitive support for multiple component contact types May. 7, 2013
8432040 Interconnection structure design for low RC delay and leakage Apr. 30, 2013
8420528 Manufacturing method of a semiconductor device having wirings Apr. 16, 2013
8415804 Semiconductor chip, method of fabricating the same, and stack module and memory card including the same Apr. 9, 2013
8415799 Dual damascene interconnect in hybrid dielectric Apr. 9, 2013
8410578 Method of manufacturing a semiconductor component and structure Apr. 2, 2013
8404580 Methods for fabricating semiconductor devices Mar. 26, 2013
8389402 Method for via formation in a semiconductor device Mar. 5, 2013
8373273 Methods of forming integrated circuit devices having damascene interconnects therein with metal diffusion barrier layers and devices formed thereby Feb. 12, 2013
8372739 Diffusion barrier for integrated circuits formed from a layer of reactive metal and method of fabrication Feb. 12, 2013
8334203 Interconnect structure and method of fabricating Dec. 18, 2012
8330275 Interconnect structure for semiconductor devices Dec. 11, 2012
8329552 Semiconductor device and method of manufacture Dec. 11, 2012
8299619 Semiconductor device having a multilayer interconnection structure Oct. 30, 2012
8298935 Dual damascene process Oct. 30, 2012
8293644 Methods of manufacturing a semiconductor memory device Oct. 23, 2012
8293641 Nano imprint technique with increased flexibility with respect to alignment and feature shaping Oct. 23, 2012
8293638 Method of fabricating damascene structures Oct. 23, 2012
8232200 Methods of forming integrated circuit devices having damascene interconnects therein with metal diffusion barrier layers and devices formed thereby Jul. 31, 2012
8227922 Semiconductor device having a multilayer interconnection structure that includes an etching stopper film Jul. 24, 2012
8216940 Method for manufacturing a semiconductor device Jul. 10, 2012
8211793 Structures electrically connecting aluminum and copper interconnections and methods of forming the same Jul. 3, 2012
8211791 Method for fabricating circuitry component Jul. 3, 2012
8207610 Semiconductor device having a multilayer interconnection structure Jun. 26, 2012
8207060 High yield and high throughput method for the manufacture of integrated circuit devices of improved integrity, performance and reliability Jun. 26, 2012
8193642 Interlayer insulating film, interconnection structure, and methods of manufacturing the same Jun. 5, 2012
8193087 Process for improving copper line cap formation Jun. 5, 2012
8183061 High density spin-transfer torque MRAM process May. 22, 2012
8169080 Semiconductor device and method of manufacture thereof May. 1, 2012
8153503 Protection of cavities opening onto a face of a microstructured element Apr. 10, 2012
8143162 Interconnect structure having a silicide/germanide cap layer Mar. 27, 2012











 
 
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