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Class Information
Number: 257/E21.579
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) > Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) > By forming via holes (epo) > For "dual damascene" type structures (epo)
Description: This subclass is indented under subclass E21.577. This subclass is substantially the same in scope as ECLA classification H01L21/768B2D.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7618889 |
Dual damascene fabrication with low k materials |
Nov. 17, 2009 |
| 7618887 |
Semiconductor device with a metal line and method of forming the same |
Nov. 17, 2009 |
| 7611991 |
Technique for increasing adhesion of metallization layers by providing dummy vias |
Nov. 3, 2009 |
| 7611986 |
Dual damascene patterning method |
Nov. 3, 2009 |
| 7608928 |
Laminated body and semiconductor device |
Oct. 27, 2009 |
| 7605471 |
Semiconductor devices and methods for manufacturing the same |
Oct. 20, 2009 |
| 7605470 |
Dummy patterns and method of manufacture for mechanical strength of low K dielectric materials in copper interconnect structures for semiconductor devices |
Oct. 20, 2009 |
| 7602066 |
Method of filling structures for forming via-first dual damascene interconnects |
Oct. 13, 2009 |
| 7602027 |
Semiconductor component and method of manufacture |
Oct. 13, 2009 |
| 7598174 |
Feature patterning methods |
Oct. 6, 2009 |
| 7598172 |
Method for manufacturing semiconductor device by using dual damascene process and method for manufacturing article having communicating hole |
Oct. 6, 2009 |
| 7598168 |
Method of fabricating dual damascene interconnection and etchant for stripping sacrificial layer |
Oct. 6, 2009 |
| 7592258 |
Metallization layer of a semiconductor device having differently thick metal lines and a method of forming the same |
Sep. 22, 2009 |
| 7585758 |
Interconnect layers without electromigration |
Sep. 8, 2009 |
| 7582555 |
CVD flowable gap fill |
Sep. 1, 2009 |
| 7576001 |
Manufacturing method for semiconductor device |
Aug. 18, 2009 |
| 7575996 |
Semiconductor device and method for manufacturing the same |
Aug. 18, 2009 |
| 7575995 |
Method of forming fine metal pattern and method of forming metal line using the same |
Aug. 18, 2009 |
| 7572717 |
Method of manufacturing semiconductor device |
Aug. 11, 2009 |
| 7569478 |
Method and apparatus for manufacturing semiconductor device, control program and computer storage medium |
Aug. 4, 2009 |
| 7569477 |
Method for fabricating fine pattern in semiconductor device |
Aug. 4, 2009 |
| 7566658 |
Method for fabricating a metal interconnection using a dual damascene process and resulting semiconductor device |
Jul. 28, 2009 |
| 7563710 |
Method of fabrication of interconnect structures |
Jul. 21, 2009 |
| 7560795 |
Semiconductor device with a capacitor |
Jul. 14, 2009 |
| 7557043 |
Method of fabricating the stacked structure and damascene process |
Jul. 7, 2009 |
| 7557035 |
Method of forming semiconductor devices by microwave curing of low-k dielectric films |
Jul. 7, 2009 |
| 7557034 |
Semiconductor device and a method of manufacturing the same |
Jul. 7, 2009 |
| 7557025 |
Method of etching a dielectric layer to form a contact hole and a via hole and damascene method |
Jul. 7, 2009 |
| 7553761 |
Method of fabricating semiconductor device |
Jun. 30, 2009 |
| 7553758 |
Method of fabricating interconnections of microelectronic device using dual damascene process |
Jun. 30, 2009 |
| 7550822 |
Dual-damascene metal wiring patterns for integrated circuit devices |
Jun. 23, 2009 |
| 7550376 |
Semiconductor device capable of suppressing current concentration in pad and its manufacture method |
Jun. 23, 2009 |
| 7544603 |
Method of fabricating silicon nitride layer and method of fabricating semiconductor device |
Jun. 9, 2009 |
| 7544601 |
Semiconductor device and a method for manufacturing the same |
Jun. 9, 2009 |
| 7541281 |
Method for manufacturing electronic device |
Jun. 2, 2009 |
| 7538353 |
Composite barrier/etch stop layer comprising oxygen doped SiC and SiC for interconnect structures |
May. 26, 2009 |
| 7538028 |
Barrier layer, IC via, and IC line forming methods |
May. 26, 2009 |
| 7538025 |
Dual damascene process flow for porous low-k materials |
May. 26, 2009 |
| 7538024 |
Method of fabricating a dual-damascene copper structure |
May. 26, 2009 |
| 7534721 |
Semiconductor device manufacturing device |
May. 19, 2009 |
| 7534711 |
System and method for direct etching |
May. 19, 2009 |
| 7528493 |
Interconnect structure and method of fabrication of same |
May. 5, 2009 |
| 7521802 |
Semiconductor device having a refractory metal containing film and method for manufacturing the same |
Apr. 21, 2009 |
| 7521352 |
Method for manufacturing a semiconductor device |
Apr. 21, 2009 |
| 7514356 |
Ribs for line collapse prevention in damascene structures |
Apr. 7, 2009 |
| 7514354 |
Methods for forming damascene wiring structures having line and plug conductors formed from different materials |
Apr. 7, 2009 |
| 7510961 |
Utilization of energy absorbing layer to improve metal flow and fill in a novel interconnect structure |
Mar. 31, 2009 |
| 7507660 |
Deposition processes for tungsten-containing barrier layers |
Mar. 24, 2009 |
| 7504333 |
Method of forming bit line of semiconductor device |
Mar. 17, 2009 |
| 7501353 |
Method of formation of a damascene structure utilizing a protective film |
Mar. 10, 2009 |
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