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Class Information
Number: 257/E21.578
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) > Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) > By forming via holes (epo) > Tapered via holes (epo)
Description: This subclass is indented under subclass E21.577. This subclass is substantially the same in scope as ECLA classification H01L21/768B2B.
Patents under this class:
| Patent Number |
Title Of Patent |
Date Issued |
| 7618892 |
Via hole forming method |
Nov. 17, 2009 |
| 7613369 |
Design of CMOS integrated germanium photodiodes |
Nov. 3, 2009 |
| 7598169 |
Method to remove beol sacrificial materials and chemical residues by irradiation |
Oct. 6, 2009 |
| 7569481 |
Method for forming via-hole in semiconductor device |
Aug. 4, 2009 |
| 7560360 |
Methods for enhancing trench capacitance and trench capacitor |
Jul. 14, 2009 |
| 7560378 |
Method for manufacturing semiconductor device |
Jul. 14, 2009 |
| 7557304 |
Printed circuit board having closed vias |
Jul. 7, 2009 |
| 7553748 |
Semiconductor device and method of manufacturing the same |
Jun. 30, 2009 |
| 7545045 |
Dummy via for reducing proximity effect and method of using the same |
Jun. 9, 2009 |
| 7528065 |
Structure and method for MOSFET gate electrode landing pad |
May. 5, 2009 |
| 7524724 |
Method of forming titanium nitride layer and method of fabricating capacitor using the same |
Apr. 28, 2009 |
| 7485967 |
Semiconductor device with via hole for electric connection |
Feb. 3, 2009 |
| 7482694 |
Semiconductor device and its manufacturing method |
Jan. 27, 2009 |
| 7456097 |
System and method for faceting via top corners to improve metal fill |
Nov. 25, 2008 |
| 7452795 |
Semiconductor device and method for fabricating the same |
Nov. 18, 2008 |
| 7439177 |
Method of manufacturing semiconductor device for improving contact hole filling characteristics while reducing parasitic capacitance of inter-metal dielectric |
Oct. 21, 2008 |
| 7411240 |
Integrated circuits including spacers that extend beneath a conductive line |
Aug. 12, 2008 |
| 7338897 |
Method of fabricating a semiconductor device having metal wiring |
Mar. 4, 2008 |
| 7271090 |
Guard ring of a combination wafer or singulated die |
Sep. 18, 2007 |
| 7192862 |
Semiconductor device and method of manufacturing the same |
Mar. 20, 2007 |
| 7163890 |
Methods of fabricating semiconductor device having slope at lower sides of interconnection hole with etch-stop layer |
Jan. 16, 2007 |
| 7119442 |
Semiconductor device |
Oct. 10, 2006 |
| 7101786 |
Method for forming a metal line in a semiconductor device |
Sep. 5, 2006 |
| 7071088 |
Method for fabricating bulbous-shaped vias |
Jul. 4, 2006 |
| 7061015 |
Contact portion of semiconductor device, and thin film transistor array panel for display device including the contact portion |
Jun. 13, 2006 |
| 7045896 |
Metal interconnect layer of semiconductor device and method for forming a metal interconnect layer |
May. 16, 2006 |
| 7033954 |
Etching of high aspect ration structures |
Apr. 25, 2006 |
| 7029946 |
Method for manufacturing semiconductor device and semiconductor device |
Apr. 18, 2006 |
| 7026715 |
Semiconductor device having wiring layer formed in wiring groove |
Apr. 11, 2006 |
| 7011994 |
Method of forming wiring and method of manufacturing image display system by using the same |
Mar. 14, 2006 |
| 7001839 |
Semiconductor device with tapered contact hole and wire groove |
Feb. 21, 2006 |
| 6998348 |
Method for manufacturing electronic circuits integrated on a semiconductor substrate |
Feb. 14, 2006 |
| 6984583 |
Stereolithographic method for forming insulative coatings for via holes in semiconductor devices |
Jan. 10, 2006 |
| 6984542 |
Method of forming wiring |
Jan. 10, 2006 |
| 6979643 |
Interlayer connections for layered electronic devices |
Dec. 27, 2005 |
| 6979641 |
Methods of forming a conductive contact through a dielectric |
Dec. 27, 2005 |
| 6953746 |
Method of manufacturing a semiconductor apparatus with a tapered aperture pattern to form a predetermined line width |
Oct. 11, 2005 |
| 6936924 |
Semiconductor device with tapered contact hole and wire groove |
Aug. 30, 2005 |
| 6933229 |
Method of manufacturing semiconductor device featuring formation of conductive plugs |
Aug. 23, 2005 |
| 6933208 |
Method of forming wiring, and method of arranging devices and method of manufacturing image display system by using the same |
Aug. 23, 2005 |
| 6930014 |
Method of forming semiconductor device capacitor bottom electrode having cylindrical shape |
Aug. 16, 2005 |
| 6924555 |
Specially shaped contact via and integrated circuit therewith |
Aug. 2, 2005 |
| 6921725 |
Etching of high aspect ratio structures |
Jul. 26, 2005 |
| 6921724 |
Variable temperature processes for tunable electrostatic chuck |
Jul. 26, 2005 |
| 6919640 |
Semiconductor device having a contact window including a lower region with a wider width to provide a lower contact resistance |
Jul. 19, 2005 |
| 6900462 |
Semiconductor device and manufacturing method thereof |
May. 31, 2005 |
| 6867120 |
Method of fabricating a semiconductor device with a gold conductive layer and organic insulating layer |
Mar. 15, 2005 |
| 6855999 |
Schottky diode having a shallow trench contact structure for preventing junction leakage |
Feb. 15, 2005 |
| 6852592 |
Methods for fabricating semiconductor devices |
Feb. 8, 2005 |
| 6849500 |
Method for manufacturing a nonvolatile memory device including an opening formed into an inverse-tapered shape |
Feb. 1, 2005 |
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