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Class Information
Number: 257/E21.577
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo) > Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) > By forming via holes (epo)
Description: This subclass is indented under subclass E21.576. This subclass is substantially the same in scope as ECLA classification H01L21/768B2.










Sub-classes under this class:

Class Number Class Name Patents
257/E21.579 For "dual damascene" type structures (epo) 1,763
257/E21.578 Tapered via holes (epo) 493


Patents under this class:

Patent Number Title Of Patent Date Issued
8710672 Semiconductor device and method of manufacturing the same Apr. 29, 2014
8709945 Area efficient through-hole connections Apr. 29, 2014
8704375 Barrier structures and methods for through substrate vias Apr. 22, 2014
8691691 TSV pillar as an interconnecting structure Apr. 8, 2014
8685851 MOS device with memory function and manufacturing method thereof Apr. 1, 2014
8685810 Power layout for integrated circuits Apr. 1, 2014
8673749 Semiconductor device manufacturing method Mar. 18, 2014
8664114 Image sensor and method for fabricating the same Mar. 4, 2014
8647979 Buffer layer to enhance photo and/or laser sintering Feb. 11, 2014
8633599 Semiconductor chip with underfill anchors Jan. 21, 2014
8633106 Heterojunction bipolar transistors and methods of manufacture Jan. 21, 2014
8623751 Through-hole electrode substrate and method of manufacturing the same Jan. 7, 2014
8618634 Semiconductor device manufacturing method and semiconductor device Dec. 31, 2013
8617975 Semiconductor processing methods Dec. 31, 2013
8610204 Semiconductor device Dec. 17, 2013
8598040 ETCH process for 3D flash structures Dec. 3, 2013
8592990 Semiconductor device and method of manufacturing semiconductor device Nov. 26, 2013
8592981 Via structure and method thereof Nov. 26, 2013
8592979 Semiconductor device conductive pattern structures and methods of manufacturing the same Nov. 26, 2013
8592304 Method for filling metal Nov. 26, 2013
8587125 Method of manufacturing layered chip package Nov. 19, 2013
8581389 Uniformity control for IC passivation structure Nov. 12, 2013
8580675 Two-track cross-connect in double-patterned structure using rectangular via Nov. 12, 2013
8575020 Pattern-split decomposition strategy for double-patterned lithography process Nov. 5, 2013
8569888 Wiring structure and method of forming the structure Oct. 29, 2013
8564135 Backside illuminated sensor and manufacturing method thereof Oct. 22, 2013
8551882 Back-side contact formation Oct. 8, 2013
8551874 MOSFET gate and source/drain contact metallization Oct. 8, 2013
8546255 Method for forming vias in a semiconductor substrate and a semiconductor device having the semiconductor substrate Oct. 1, 2013
8536051 Manufacture method for semiconductor device Sep. 17, 2013
8530309 Memory device and method for fabricating the same Sep. 10, 2013
8518821 Semiconductor device and a method of manufacturing the same Aug. 27, 2013
8513119 Method of forming bump structure having tapered sidewalls for stacked dies Aug. 20, 2013
8513061 Method of fabricating a TSV for 3D packaging of semiconductor device Aug. 20, 2013
8508051 Protection film having a plurality of openings above an electrode pad Aug. 13, 2013
8492274 Metal alloy cap integration Jul. 23, 2013
8492269 Hybrid contact structure with low aspect ratio contacts in a semiconductor device Jul. 23, 2013
8487412 Semiconductor device and a method of manufacturing the same Jul. 16, 2013
8482129 Wafer-level stack package and method of fabricating the same Jul. 9, 2013
8481423 Methods to mitigate plasma damage in organosilicate dielectrics Jul. 9, 2013
8476763 Semiconductor device conductive pattern structures including dummy conductive patterns Jul. 2, 2013
8476742 Fluid ejection device comprising substrate contact via Jul. 2, 2013
8470706 Methods to mitigate plasma damage in organosilicate dielectrics Jun. 25, 2013
8466069 Method for manufacturing semiconductor device Jun. 18, 2013
8466062 TSV backside processing using copper damascene interconnect technology Jun. 18, 2013
8466059 Multi-layer interconnect structure for stacked dies Jun. 18, 2013
8466056 Method of forming metal interconnect structures in ultra low-k dielectrics Jun. 18, 2013
8461689 Packaging structure having embedded semiconductor element Jun. 11, 2013
8461038 Two-track cross-connects in double-patterned metal layers using a forbidden zone Jun. 11, 2013
8461012 Device with ground plane for high frequency signal transmission and method therefor Jun. 11, 2013











 
 
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