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Class Information
Number: 257/E21.575
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Interconnections, comprising conductors and dielectrics, for carrying current between separate components within device (epo)
Description: This subclass is indented under subclass E21.536. This subclass is substantially the same in scope as ECLA classification H01L21/768.










Sub-classes under this class:

Class Number Class Name Patents
257/E21.576 Characterized by formation and post treatment of dielectrics, e.g., planarizing (epo) 2,085
257/E21.597 Formed through semiconductor substrate (epo) 628


Patents under this class:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

Patent Number Title Of Patent Date Issued
8709880 Method for fabrication of a semiconductor device and structure Apr. 29, 2014
8710659 Semiconductor device and method of manufacturing the same Apr. 29, 2014
8710671 Multi-level integrated circuit, device and method for modeling multi-level integrated circuits Apr. 29, 2014
8704353 Thermal management of stacked semiconductor chips with electrically non-functional interconnects Apr. 22, 2014
8703543 Vertical sensor assembly method Apr. 22, 2014
8703615 Copper electroplating process for uniform across wafer deposition and void free filling on ruthenium coated wafers Apr. 22, 2014
8704331 MEMS integrated chip with cross-area interconnection Apr. 22, 2014
8686571 Bonding layer structure and method for wafer to wafer bonding Apr. 1, 2014
8686474 III-V compound semiconductor epitaxy from a non-III-V substrate Apr. 1, 2014
8680682 Barrier for through-silicon via Mar. 25, 2014
8673764 Method and system for making and cleaning semiconductor device Mar. 18, 2014
8673779 Interconnect with self-formed barrier Mar. 18, 2014
8669661 Metal line and via formation using hard masks Mar. 11, 2014
8664116 Heat treatment method for growing silicide Mar. 4, 2014
8664763 Semiconductor apparatus, electronic device, and method of manufacturing semiconductor apparatus Mar. 4, 2014
8648472 Semiconductor device Feb. 11, 2014
8647991 Method for forming dual damascene opening Feb. 11, 2014
8642464 Method of manufacturing semiconductor device Feb. 4, 2014
8637990 Semiconductor device and method for fabricating the same Jan. 28, 2014
8633601 Interconnect assemblies and methods of making and using same Jan. 21, 2014
8624370 Integrated circuit packaging system with an interposer and method of manufacture thereof Jan. 7, 2014
8624381 Integrated antennas in wafer level package Jan. 7, 2014
8614515 Wiring method for semiconductor integrated circuit, semiconductor-circuit wiring apparatus and semiconductor integrated circuit Dec. 24, 2013
8610176 Standard cell architecture using double poly patterning for multi VT devices Dec. 17, 2013
8603905 Dual alignment strategy for optimizing contact layer alignment Dec. 10, 2013
8598677 Semiconductor device including metal lines Dec. 3, 2013
8598694 Chip-package having a cavity and a manufacturing method thereof Dec. 3, 2013
8598709 Method and system for routing electrical connections of semiconductor chips Dec. 3, 2013
8586471 Seed layers for metallic interconnects and products Nov. 19, 2013
8586469 Metal layer end-cut flow Nov. 19, 2013
8587037 Test structure to monitor the in-situ channel temperature of field effect transistors Nov. 19, 2013
8587038 Electric component and method of manufacturing the electric component Nov. 19, 2013
8581387 Through wire interconnect (TWI) having bonded connection and encapsulating polymer layer Nov. 12, 2013
8569165 Self-aligned barrier and capping layers for interconnects Oct. 29, 2013
8569160 Device fabrication Oct. 29, 2013
8569154 Three dimensional integration and methods of through silicon via creation Oct. 29, 2013
8552559 Very thick metal interconnection scheme in IC chips Oct. 8, 2013
8541306 Semiconductor device and method of double photolithography process for forming patterns of the semiconductor device Sep. 24, 2013
8541879 Super-self-aligned contacts and method for making the same Sep. 24, 2013
8530276 Method for manufacturing a microelectronic device and a microelectronic device thus manufactured Sep. 10, 2013
8525167 Laminated chips package, semiconductor substrate and method of manufacturing the laminated chips package Sep. 3, 2013
8518819 Semiconductor device contact structures and methods for making the same Aug. 27, 2013
8513124 Copper electroplating process for uniform across wafer deposition and void free filling on semi-noble metal coated wafers Aug. 20, 2013
8502383 Integrated circuit including detection circuit to detect electrical energy delivered by a thermoelectric material Aug. 6, 2013
8497201 Self-assembly pattern for semiconductor integrated circuit Jul. 30, 2013
8492202 Semiconductor device and method of manufacturing the same Jul. 23, 2013
8492269 Hybrid contact structure with low aspect ratio contacts in a semiconductor device Jul. 23, 2013
8492270 Structure for nano-scale metallization and method for fabricating same Jul. 23, 2013
8486760 Method of manufacturing substrate for flip chip and substrate for flip chip manufactured using the same Jul. 16, 2013
8487443 Semiconductor structure, manufacturing method of semiconductor structure and semiconductor device Jul. 16, 2013

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