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Class Information
Number: 257/E21.573
Name: Active solid-state devices (e.g., transistors, solid-state diodes) > Processes or apparatus adapted for manufacture or treatment of semiconductor or solid-state devices or of parts thereof (epo) > Manufacture or treatment of devices consisting of plurality of solid-state components formed in or on common substrate or of parts thereof; manufacture of integrated circuit devices or of parts thereof (epo) > Manufacture of specific parts of devices (epo) > Making of isolation regions between components (epo) > Air gaps (epo)
Description: This subclass is indented under subclass E21.54. This subclass is substantially the same in scope as ECLA classification H01L21/764.










Patents under this class:
1 2 3 4 5 6 7

Patent Number Title Of Patent Date Issued
6987051 Method of making cavities in a semiconductor wafer Jan. 17, 2006
6949839 Aligned buried structures formed by surface transformation of empty spaces in solid state materials Sep. 27, 2005
6921704 Method for improving MOS mobility Jul. 26, 2005
6903461 Semiconductor device having a region of a material which is vaporized upon exposing to ultraviolet radiation Jun. 7, 2005
6891387 System for probing, testing, burn-in, repairing and programming of integrated circuits May. 10, 2005
6869856 Process for manufacturing a semiconductor wafer integrating electronic devices including a structure for electromagnetic decoupling Mar. 22, 2005
6849918 Miniaturized dielectrically isolated solid state device Feb. 1, 2005
6841408 Method of alignment for buried structures formed by surface transformation of empty spaces in solid state materials Jan. 11, 2005
6838896 Method and system for probing, testing, burn-in, repairing and programming of integrated circuits in a closed environment using a single apparatus Jan. 4, 2005
6830987 Semiconductor device with a silicon-on-void structure and method of making the same Dec. 14, 2004
6828646 Isolating trench and manufacturing process Dec. 7, 2004
6828171 Systems and methods for thermal isolation of a silicon structure Dec. 7, 2004
6818525 Semiconductor device and method of providing regions of low substrate capacitance Nov. 16, 2004
6815826 Alignment for buried structures formed by surface transformation of empty spaces in solid state materials Nov. 9, 2004
6812508 Semiconductor substrate and method for fabricating the same Nov. 2, 2004
6812525 Trench fill process Nov. 2, 2004
6790751 Semiconductor substrate for a one-chip electronic device and related manufacturing method Sep. 14, 2004
6791155 Stress-relieved shallow trench isolation (STI) structure and method for forming the same Sep. 14, 2004
6784076 Process for making a silicon-on-insulator ledge by implanting ions from silicon source Aug. 31, 2004
6780753 Airgap for semiconductor devices Aug. 24, 2004
6759746 Die attachment and method Jul. 6, 2004
6734094 Method of forming an air gap within a structure by exposing an ultraviolet sensitive material to ultraviolet radiation May. 11, 2004
6727157 Method for forming a shallow trench isolation using air gap Apr. 27, 2004
6713356 Method for making a semiconductor device comprising a stack alternately consisting of silicon layers and dielectric material layers Mar. 30, 2004
6713235 Method for fabricating thin-film substrate and thin-film substrate fabricated by the method Mar. 30, 2004
6713327 Stress controlled dielectric integrated circuit fabrication Mar. 30, 2004
6714625 Lithography device for semiconductor circuit pattern generation Mar. 30, 2004
6682981 Stress controlled dielectric integrated circuit fabrication Jan. 27, 2004
6670257 Method for forming horizontal buried channels or cavities in wafers of monocrystalline semiconductor material Dec. 30, 2003
6664193 Device isolation process flow for ARS system Dec. 16, 2003
6661068 Semiconductor device and method of providing regions of low substrate capacitance Dec. 9, 2003
6653656 Semiconductor device formed on insulating layer and method of manufacturing the same Nov. 25, 2003
6639327 Semiconductor member, semiconductor device and manufacturing methods thereof Oct. 28, 2003
6621096 Device isolation process flow for ARS system Sep. 16, 2003
6621136 Semiconductor device having regions of low substrate capacitance Sep. 16, 2003
6613652 Method for fabricating SOI devices with option of incorporating air-gap feature for better insulation and performance Sep. 2, 2003
6613644 Method for forming a dielectric zone in a semiconductor substrate Sep. 2, 2003
6579738 Method of alignment for buried structures formed by surface transformation of empty spaces in solid state materials Jun. 17, 2003
6569702 Triple layer isolation for silicon microstructure and structures formed using the same May. 27, 2003
6566206 Semiconductor structure having more usable substrate area and method for forming same May. 20, 2003
6563190 Capacitor array preventing crosstalk between adjacent capacitors in semiconductor device May. 13, 2003
6548883 Reduced RC between adjacent substrate wiring lines Apr. 15, 2003
6531376 Method of making a semiconductor device with a low permittivity region Mar. 11, 2003
6518641 Deep slit isolation with controlled void Feb. 11, 2003
6518134 Method for fabricating a semiconductor device with an air tunnel formed in the lower part of a transistor channel Feb. 11, 2003
6509210 Semiconductor device and method for fabricating the same Jan. 21, 2003
6509583 Semiconductor device formed on insulating layer and method of manufacturing the same Jan. 21, 2003
6509623 Microelectronic air-gap structures and methods of forming the same Jan. 21, 2003
6498069 Semiconductor device and method of integrating trench structures Dec. 24, 2002
6498382 Semiconductor configuration Dec. 24, 2002

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